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ARM Dynarec: Temporarily remove looping optimizations

This commit is contained in:
Jeffrey Pfau 2016-07-31 17:49:23 -07:00
parent 187b4bb7d3
commit 8eb38e0c3e
2 changed files with 2 additions and 37 deletions
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35
src/arm/dynarec-arm/dynarec-impl.c
View File

@ -119,7 +119,6 @@ void ARMDynarecRecompileTrace(struct ARMCore* cpu, struct ARMDynarecTrace* trace
struct ARMDynarecContext ctx = { struct ARMDynarecContext ctx = {
.code = cpu->dynarec.buffer, .code = cpu->dynarec.buffer,
.address = trace->start, .address = trace->start,
.labels = cpu->dynarec.temporaryMemory,
.cycles = 0, .cycles = 0,
}; };
if (trace->mode == MODE_ARM) { if (trace->mode == MODE_ARM) {
@ -132,11 +131,8 @@ void ARMDynarecRecompileTrace(struct ARMCore* cpu, struct ARMDynarecTrace* trace
__attribute__((aligned(64))) struct ARMInstructionInfo info; __attribute__((aligned(64))) struct ARMInstructionInfo info;
while (true) { while (true) {
uint16_t instruction = cpu->memory.load16(cpu, ctx.address, 0); uint16_t instruction = cpu->memory.load16(cpu, ctx.address, 0);
struct ARMDynarecLabel* label = &ctx.labels[(ctx.address - trace->start) >> 1];
ARMDecodeThumb(instruction, &info); ARMDecodeThumb(instruction, &info);
ctx.address += WORD_SIZE_THUMB; ctx.address += WORD_SIZE_THUMB;
label->code = ctx.code;
label->pc = ctx.address + WORD_SIZE_THUMB;
if (needsUpdatePC(&info)) { if (needsUpdatePC(&info)) {
updatePC(&ctx, ctx.address + WORD_SIZE_THUMB); updatePC(&ctx, ctx.address + WORD_SIZE_THUMB);
} }
@ -176,40 +172,13 @@ void ARMDynarecRecompileTrace(struct ARMCore* cpu, struct ARMDynarecTrace* trace
EMIT(&ctx, BL, AL, ctx.code, _thumbTable[instruction >> 6]); EMIT(&ctx, BL, AL, ctx.code, _thumbTable[instruction >> 6]);
break; break;
} }
if (info.branchType == ARM_BRANCH) { if (needsUpdateEvents(&info)) {
struct ARMDynarecLabel* label = NULL;
uint32_t base = ctx.address + info.op1.immediate + WORD_SIZE_THUMB;
if (info.op1.immediate <= 0) {
if (base > trace->start) {
label = &ctx.labels[(base - trace->start) >> 1];
}
}
// Assume branch not taken
if (info.condition == ARM_CONDITION_AL) {
updateEvents(&ctx, cpu);
break;
}
EMIT_IMM(&ctx, AL, 5, ctx.address + WORD_SIZE_THUMB);
EMIT(&ctx, LDRI, AL, 1, 4, ARM_PC * sizeof(uint32_t));
EMIT(&ctx, CMP, AL, 1, 5);
if (!label || !label->code) {
EMIT(&ctx, POP, NE, 0x8030);
} else {
code_t* l2 = ctx.code;
++ctx.code;
EMIT(&ctx, MOV, AL, 5, 1);
updateEvents(&ctx, cpu);
EMIT(&ctx, B, AL, ctx.code, label->code);
EMIT_L(l2, B, EQ, l2, ctx.code);
}
} else if (needsUpdateEvents(&info)) {
updateEvents(&ctx, cpu); updateEvents(&ctx, cpu);
} }
if (info.branchType > ARM_BRANCH || info.traps) { if (info.branchType >= ARM_BRANCH || info.traps) {
break; break;
} }
} }
memset(ctx.labels, 0, sizeof(struct ARMDynarecLabel) * ((ctx.address - trace->start) >> 1));
flushPrefetch(&ctx, cpu->memory.load16(cpu, ctx.address, 0), cpu->memory.load16(cpu, ctx.address + WORD_SIZE_THUMB, 0)); flushPrefetch(&ctx, cpu->memory.load16(cpu, ctx.address, 0), cpu->memory.load16(cpu, ctx.address + WORD_SIZE_THUMB, 0));
flushCycles(&ctx); flushCycles(&ctx);
EMIT(&ctx, POP, AL, 0x8030); EMIT(&ctx, POP, AL, 0x8030);

4
src/arm/dynarec-arm/emitter.h
View File

@ -19,10 +19,6 @@ typedef uint32_t code_t;
struct ARMDynarecContext { struct ARMDynarecContext {
code_t* code; code_t* code;
uint32_t address; uint32_t address;
struct ARMDynarecLabel {
code_t* code;
uint32_t pc;
}* labels;
int32_t cycles; int32_t cycles;
}; };