ARM: Optimize PC-write functions

This commit is contained in:
Vicki Pfau 2021-02-21 12:27:07 -08:00
parent 708d8f6bc3
commit 8926aeea01
1 changed files with 12 additions and 10 deletions

View File

@ -56,20 +56,22 @@
#define ARM_ILL cpu->irqh.hitIllegal(cpu, opcode) #define ARM_ILL cpu->irqh.hitIllegal(cpu, opcode)
static inline int32_t ARMWritePC(struct ARMCore* cpu) { static inline int32_t ARMWritePC(struct ARMCore* cpu) {
cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_ARM); uint32_t pc = cpu->gprs[ARM_PC] & -WORD_SIZE_ARM;
cpu->memory.setActiveRegion(cpu, cpu->gprs[ARM_PC]); cpu->memory.setActiveRegion(cpu, pc);
LOAD_32(cpu->prefetch[0], cpu->gprs[ARM_PC] & cpu->memory.activeMask, cpu->memory.activeRegion); LOAD_32(cpu->prefetch[0], pc & cpu->memory.activeMask, cpu->memory.activeRegion);
cpu->gprs[ARM_PC] += WORD_SIZE_ARM; pc += WORD_SIZE_ARM;
LOAD_32(cpu->prefetch[1], cpu->gprs[ARM_PC] & cpu->memory.activeMask, cpu->memory.activeRegion); LOAD_32(cpu->prefetch[1], pc & cpu->memory.activeMask, cpu->memory.activeRegion);
cpu->gprs[ARM_PC] = pc;
return 2 + cpu->memory.activeNonseqCycles32 + cpu->memory.activeSeqCycles32; return 2 + cpu->memory.activeNonseqCycles32 + cpu->memory.activeSeqCycles32;
} }
static inline int32_t ThumbWritePC(struct ARMCore* cpu) { static inline int32_t ThumbWritePC(struct ARMCore* cpu) {
cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_THUMB); uint32_t pc = cpu->gprs[ARM_PC] & -WORD_SIZE_THUMB;
cpu->memory.setActiveRegion(cpu, cpu->gprs[ARM_PC]); cpu->memory.setActiveRegion(cpu, pc);
LOAD_16(cpu->prefetch[0], cpu->gprs[ARM_PC] & cpu->memory.activeMask, cpu->memory.activeRegion); LOAD_16(cpu->prefetch[0], pc & cpu->memory.activeMask, cpu->memory.activeRegion);
cpu->gprs[ARM_PC] += WORD_SIZE_THUMB; pc += WORD_SIZE_THUMB;
LOAD_16(cpu->prefetch[1], cpu->gprs[ARM_PC] & cpu->memory.activeMask, cpu->memory.activeRegion); LOAD_16(cpu->prefetch[1], pc & cpu->memory.activeMask, cpu->memory.activeRegion);
cpu->gprs[ARM_PC] = pc;
return 2 + cpu->memory.activeNonseqCycles16 + cpu->memory.activeSeqCycles16; return 2 + cpu->memory.activeNonseqCycles16 + cpu->memory.activeSeqCycles16;
} }