mirror of https://github.com/mgba-emu/mgba.git
ARM Debugger: Disassembler now resolves addresses to symbol names
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CHANGES
1
CHANGES
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@ -9,6 +9,7 @@ Features:
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- New unlicensed GB mappers: Pokémon Jade/Diamond, BBD, and Hitek
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- Stack tracing tools in ARM debugger (by ahigerd)
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- Command scripts for CLI debugger (by ahigerd)
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- ARM disassembler now resolves addresses to symbol names
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Emulation fixes:
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- ARM: Fix ALU reading PC after shifting
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- ARM: Fix STR storing PC after address calculation
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@ -212,11 +212,12 @@ struct ARMInstructionInfo {
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unsigned nDataCycles : 10;
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};
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struct mDebuggerSymbols;
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void ARMDecodeARM(uint32_t opcode, struct ARMInstructionInfo* info);
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void ARMDecodeThumb(uint16_t opcode, struct ARMInstructionInfo* info);
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bool ARMDecodeThumbCombine(struct ARMInstructionInfo* info1, struct ARMInstructionInfo* info2,
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struct ARMInstructionInfo* out);
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int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, int blen);
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int ARMDisassemble(struct ARMInstructionInfo* info, struct ARMCore* core, const struct mDebuggerSymbols* symbols, uint32_t pc, char* buffer, int blen);
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uint32_t ARMResolveMemoryAccess(struct ARMInstructionInfo* info, struct ARMRegisterFile* regs, uint32_t pc);
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CXX_GUARD_END
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@ -98,28 +98,29 @@ static void _disassembleMode(struct CLIDebugger* debugger, struct CLIDebugVector
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static inline uint32_t _printLine(struct CLIDebugger* debugger, uint32_t address, enum ExecutionMode mode) {
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struct CLIDebuggerBackend* be = debugger->backend;
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struct mCore* core = debugger->d.core;
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char disassembly[64];
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struct ARMInstructionInfo info;
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be->printf(be, "%08X: ", address);
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if (mode == MODE_ARM) {
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uint32_t instruction = debugger->d.core->busRead32(debugger->d.core, address);
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uint32_t instruction = core->busRead32(core, address);
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ARMDecodeARM(instruction, &info);
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ARMDisassemble(&info, address + WORD_SIZE_ARM * 2, disassembly, sizeof(disassembly));
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ARMDisassemble(&info, core->cpu, core->symbolTable, address + WORD_SIZE_ARM * 2, disassembly, sizeof(disassembly));
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be->printf(be, "%08X\t%s\n", instruction, disassembly);
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return WORD_SIZE_ARM;
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} else {
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struct ARMInstructionInfo info2;
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struct ARMInstructionInfo combined;
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uint16_t instruction = debugger->d.core->busRead16(debugger->d.core, address);
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uint16_t instruction2 = debugger->d.core->busRead16(debugger->d.core, address + WORD_SIZE_THUMB);
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uint16_t instruction = core->busRead16(core, address);
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uint16_t instruction2 = core->busRead16(core, address + WORD_SIZE_THUMB);
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ARMDecodeThumb(instruction, &info);
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ARMDecodeThumb(instruction2, &info2);
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if (ARMDecodeThumbCombine(&info, &info2, &combined)) {
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ARMDisassemble(&combined, address + WORD_SIZE_THUMB * 2, disassembly, sizeof(disassembly));
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ARMDisassemble(&combined, core->cpu, core->symbolTable, address + WORD_SIZE_THUMB * 2, disassembly, sizeof(disassembly));
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be->printf(be, "%04X %04X\t%s\n", instruction, instruction2, disassembly);
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return WORD_SIZE_THUMB * 2;
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} else {
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ARMDisassemble(&info, address + WORD_SIZE_THUMB * 2, disassembly, sizeof(disassembly));
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ARMDisassemble(&info, core->cpu, core->symbolTable, address + WORD_SIZE_THUMB * 2, disassembly, sizeof(disassembly));
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be->printf(be, "%04X \t%s\n", instruction, disassembly);
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return WORD_SIZE_THUMB;
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}
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@ -467,6 +467,7 @@ static void ARMDebuggerListWatchpoints(struct mDebuggerPlatform* d, struct mWatc
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static void ARMDebuggerTrace(struct mDebuggerPlatform* d, char* out, size_t* length) {
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struct ARMDebugger* debugger = (struct ARMDebugger*) d;
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struct ARMCore* cpu = debugger->cpu;
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struct mCore* core = d->p->core;
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char disassembly[64];
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@ -475,17 +476,17 @@ static void ARMDebuggerTrace(struct mDebuggerPlatform* d, char* out, size_t* len
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if (cpu->executionMode == MODE_ARM) {
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uint32_t instruction = cpu->prefetch[0];
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sprintf(disassembly, "%08X: ", instruction);
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ARMDisassemble(&info, cpu->gprs[ARM_PC], disassembly + strlen("00000000: "), sizeof(disassembly) - strlen("00000000: "));
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ARMDisassemble(&info, cpu, core->symbolTable, cpu->gprs[ARM_PC], disassembly + strlen("00000000: "), sizeof(disassembly) - strlen("00000000: "));
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} else {
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uint16_t instruction = cpu->prefetch[0];
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ARMDecodeThumb(instruction, &info);
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if (isWideInstruction) {
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uint16_t instruction2 = cpu->prefetch[1];
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sprintf(disassembly, "%04X%04X: ", instruction, instruction2);
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ARMDisassemble(&info, cpu->gprs[ARM_PC], disassembly + strlen("00000000: "), sizeof(disassembly) - strlen("00000000: "));
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ARMDisassemble(&info, cpu, core->symbolTable, cpu->gprs[ARM_PC], disassembly + strlen("00000000: "), sizeof(disassembly) - strlen("00000000: "));
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} else {
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sprintf(disassembly, " %04X: ", instruction);
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ARMDisassemble(&info, cpu->gprs[ARM_PC], disassembly + strlen("00000000: "), sizeof(disassembly) - strlen("00000000: "));
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ARMDisassemble(&info, cpu, core->symbolTable, cpu->gprs[ARM_PC], disassembly + strlen("00000000: "), sizeof(disassembly) - strlen("00000000: "));
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}
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}
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@ -6,6 +6,7 @@
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#include <mgba/internal/arm/decoder.h>
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#include <mgba/internal/arm/decoder-inlines.h>
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#include <mgba/internal/debugger/symbols.h>
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#include <mgba-util/string.h>
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#define ADVANCE(AMOUNT) \
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@ -20,8 +21,8 @@
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static int _decodeRegister(int reg, char* buffer, int blen);
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static int _decodeRegisterList(int list, char* buffer, int blen);
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static int _decodePSR(int bits, char* buffer, int blen);
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static int _decodePCRelative(uint32_t address, uint32_t pc, char* buffer, int blen);
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static int _decodeMemory(struct ARMMemoryAccess memory, int pc, char* buffer, int blen);
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static int _decodePCRelative(uint32_t address, const struct mDebuggerSymbols* symbols, uint32_t pc, bool thumbBranch, char* buffer, int blen);
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static int _decodeMemory(struct ARMMemoryAccess memory, struct ARMCore* cpu, const struct mDebuggerSymbols* symbols, int pc, char* buffer, int blen);
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static int _decodeShift(union ARMOperand operand, bool reg, char* buffer, int blen);
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static const char* _armConditions[] = {
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@ -141,23 +142,66 @@ static int _decodePSR(int psrBits, char* buffer, int blen) {
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return total;
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}
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static int _decodePCRelative(uint32_t address, uint32_t pc, char* buffer, int blen) {
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return snprintf(buffer, blen, "$%08X", address + pc);
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static int _decodePCRelative(uint32_t address, const struct mDebuggerSymbols* symbols, uint32_t pc, bool thumbBranch, char* buffer, int blen) {
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address += pc;
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const char* label = NULL;
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if (symbols) {
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label = mDebuggerSymbolReverseLookup(symbols, address, -1);
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if (!label && thumbBranch) {
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label = mDebuggerSymbolReverseLookup(symbols, address | 1, -1);
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}
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}
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if (label) {
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return strlcpy(buffer, label, blen);
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} else {
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return snprintf(buffer, blen, "0x%08X", address);
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}
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}
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static int _decodeMemory(struct ARMMemoryAccess memory, int pc, char* buffer, int blen) {
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static int _decodeMemory(struct ARMMemoryAccess memory, struct ARMCore* cpu, const struct mDebuggerSymbols* symbols, int pc, char* buffer, int blen) {
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if (blen <= 1) {
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return 0;
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}
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int total = 0;
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strlcpy(buffer, "[", blen);
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ADVANCE(1);
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bool elideClose = false;
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int written;
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if (memory.format & ARM_MEMORY_REGISTER_BASE) {
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if (memory.baseReg == ARM_PC && memory.format & ARM_MEMORY_IMMEDIATE_OFFSET) {
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written = _decodePCRelative(memory.format & ARM_MEMORY_OFFSET_SUBTRACT ? -memory.offset.immediate : memory.offset.immediate, pc & 0xFFFFFFFC, buffer, blen);
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uint32_t addrBase = memory.format & ARM_MEMORY_OFFSET_SUBTRACT ? -memory.offset.immediate : memory.offset.immediate;
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if (!cpu) {
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strlcpy(buffer, "[", blen);
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ADVANCE(1);
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written = _decodePCRelative(addrBase, symbols, pc & 0xFFFFFFFC, false, buffer, blen);
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ADVANCE(written);
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} else {
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uint32_t value;
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addrBase += pc & 0xFFFFFFFC; // Thumb does not have PC-relative LDRH/LDRB
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switch (memory.width & 7) {
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case 1:
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value = cpu->memory.load8(cpu, addrBase, NULL);
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break;
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case 2:
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value = cpu->memory.load16(cpu, addrBase, NULL);
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break;
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case 4:
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value = cpu->memory.load32(cpu, addrBase, NULL);
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break;
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}
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const char* label = NULL;
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if (symbols) {
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label = mDebuggerSymbolReverseLookup(symbols, value, -1);
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}
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if (label) {
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written = snprintf(buffer, blen, "=%s", label);
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} else {
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written = snprintf(buffer, blen, "=0x%08X", value);
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}
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ADVANCE(written);
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elideClose = true;
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}
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} else {
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strlcpy(buffer, "[", blen);
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ADVANCE(1);
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written = _decodeRegister(memory.baseReg, buffer, blen);
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ADVANCE(written);
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if (memory.format & (ARM_MEMORY_REGISTER_OFFSET | ARM_MEMORY_IMMEDIATE_OFFSET) && !(memory.format & ARM_MEMORY_POST_INCREMENT)) {
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ADVANCE(2);
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}
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}
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} else {
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strlcpy(buffer, "[", blen);
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ADVANCE(1);
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}
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if (memory.format & ARM_MEMORY_POST_INCREMENT) {
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strlcpy(buffer, "], ", blen);
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ADVANCE(3);
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elideClose = true;
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}
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if (memory.format & ARM_MEMORY_IMMEDIATE_OFFSET && memory.baseReg != ARM_PC) {
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if (memory.format & ARM_MEMORY_OFFSET_SUBTRACT) {
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ADVANCE(written);
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}
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if (!(memory.format & ARM_MEMORY_POST_INCREMENT)) {
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if (!elideClose) {
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strlcpy(buffer, "]", blen);
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ADVANCE(1);
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}
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@ -322,7 +370,7 @@ static const char* _armAccessTypeStrings[] = {
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""
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};
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int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, int blen) {
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int ARMDisassemble(struct ARMInstructionInfo* info, struct ARMCore* cpu, const struct mDebuggerSymbols* symbols, uint32_t pc, char* buffer, int blen) {
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const char* mnemonic = _armMnemonicStrings[info->mnemonic];
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int written;
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int total = 0;
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@ -394,7 +442,7 @@ int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, i
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case ARM_MN_B:
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case ARM_MN_BL:
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if (info->operandFormat & ARM_OPERAND_IMMEDIATE_1) {
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written = _decodePCRelative(info->op1.immediate, pc, buffer, blen);
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written = _decodePCRelative(info->op1.immediate, symbols, pc, true, buffer, blen);
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ADVANCE(written);
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}
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break;
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@ -403,7 +451,7 @@ int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, i
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written = snprintf(buffer, blen, "#%i", info->op1.immediate);
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ADVANCE(written);
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} else if (info->operandFormat & ARM_OPERAND_MEMORY_1) {
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written = _decodeMemory(info->memory, pc, buffer, blen);
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written = _decodeMemory(info->memory, cpu, symbols, pc, buffer, blen);
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ADVANCE(written);
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} else if (info->operandFormat & ARM_OPERAND_REGISTER_1) {
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written = _decodeRegister(info->op1.reg, buffer, blen);
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@ -428,7 +476,7 @@ int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, i
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written = snprintf(buffer, blen, "#%i", info->op2.immediate);
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ADVANCE(written);
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} else if (info->operandFormat & ARM_OPERAND_MEMORY_2) {
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written = _decodeMemory(info->memory, pc, buffer, blen);
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written = _decodeMemory(info->memory, cpu, symbols, pc, buffer, blen);
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ADVANCE(written);
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} else if (info->operandFormat & ARM_OPERAND_REGISTER_2) {
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written = _decodeRegister(info->op2.reg, buffer, blen);
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@ -449,7 +497,7 @@ int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, i
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written = snprintf(buffer, blen, "#%i", info->op3.immediate);
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ADVANCE(written);
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} else if (info->operandFormat & ARM_OPERAND_MEMORY_3) {
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written = _decodeMemory(info->memory, pc, buffer, blen);
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written = _decodeMemory(info->memory, cpu, symbols, pc, buffer, blen);
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ADVANCE(written);
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} else if (info->operandFormat & ARM_OPERAND_REGISTER_3) {
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written = _decodeRegister(info->op3.reg, buffer, blen);
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@ -470,7 +518,7 @@ int ARMDisassemble(struct ARMInstructionInfo* info, uint32_t pc, char* buffer, i
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written = snprintf(buffer, blen, "#%i", info->op4.immediate);
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ADVANCE(written);
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} else if (info->operandFormat & ARM_OPERAND_MEMORY_4) {
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written = _decodeMemory(info->memory, pc, buffer, blen);
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written = _decodeMemory(info->memory, cpu, symbols, pc, buffer, blen);
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ADVANCE(written);
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} else if (info->operandFormat & ARM_OPERAND_REGISTER_4) {
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written = _decodeRegister(info->op4.reg, buffer, blen);
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