From 81f8ad27d5d30f1c7f560edcb3dd7ed8d700e315 Mon Sep 17 00:00:00 2001
From: Jeffrey Pfau <jeffrey@endrift.com>
Date: Tue, 26 Jan 2016 20:56:03 -0800
Subject: [PATCH] GB: CPU can still decode instructions during DMAs

---
 src/gb/memory.c       | 1 +
 src/lr35902/lr35902.c | 2 +-
 src/lr35902/lr35902.h | 1 +
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gb/memory.c b/src/gb/memory.c
index a6fca29a8..b5717b16d 100644
--- a/src/gb/memory.c
+++ b/src/gb/memory.c
@@ -37,6 +37,7 @@ static void _GBMemoryDMAService(struct GB* gb);
 
 void GBMemoryInit(struct GB* gb) {
 	struct LR35902Core* cpu = gb->cpu;
+	cpu->memory.cpuLoad8 = GBLoad8;
 	cpu->memory.load8 = GBLoad8;
 	cpu->memory.store8 = GBStore8;
 	cpu->memory.setActiveRegion = GBSetActiveRegion;
diff --git a/src/lr35902/lr35902.c b/src/lr35902/lr35902.c
index 5ddf028c2..47a6781e1 100644
--- a/src/lr35902/lr35902.c
+++ b/src/lr35902/lr35902.c
@@ -106,7 +106,7 @@ void LR35902Tick(struct LR35902Core* cpu) {
 			cpu->instruction = _LR35902InstructionIRQ;
 			break;
 		}
-		cpu->bus = cpu->memory.load8(cpu, cpu->pc);
+		cpu->bus = cpu->memory.cpuLoad8(cpu, cpu->pc);
 		cpu->instruction = _lr35902InstructionTable[cpu->bus];
 		++cpu->pc;
 		break;
diff --git a/src/lr35902/lr35902.h b/src/lr35902/lr35902.h
index 3b1ed0e7f..d5f40dcd2 100644
--- a/src/lr35902/lr35902.h
+++ b/src/lr35902/lr35902.h
@@ -48,6 +48,7 @@ enum LR35902ExecutionState {
 };
 
 struct LR35902Memory {
+	uint8_t (*cpuLoad8)(struct LR35902Core*, uint16_t address);
 	uint8_t (*load8)(struct LR35902Core*, uint16_t address);
 	void (*store8)(struct LR35902Core*, uint16_t address, int8_t value);