mirror of https://github.com/mgba-emu/mgba.git
Start filling in THUMB table with insane preprocessor tricks
This commit is contained in:
Jeffrey Pfau
parent
70eb3634a0
commit
76dbfce3c3
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@ -126,8 +126,6 @@ void ARMStep(struct ARMCore* cpu) {
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// Instruction definitions
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// Beware pre-processor antics
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#define UNUSED(V) (void)(V)
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#define ARM_WRITE_PC \
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cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_ARM) + WORD_SIZE_ARM
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@ -457,26 +455,6 @@ DEFINE_INSTRUCTION_ARM(SWI,)
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#define DECLARE_INSTRUCTION_ARM(EMITTER, NAME) \
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EMITTER ## NAME
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#define DO_8(DIRECTIVE) \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE
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#define DO_256(DIRECTIVE) \
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DO_8(DO_8(DIRECTIVE)), \
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DO_8(DO_8(DIRECTIVE)), \
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DO_8(DO_8(DIRECTIVE)), \
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DO_8(DO_8(DIRECTIVE))
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#define DO_INTERLACE(LEFT, RIGHT) \
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LEFT, \
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RIGHT
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#define DECLARE_ARM_ALU_IMMEDIATE_BLOCK(EMITTER, ALU) \
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DO_8(DECLARE_INSTRUCTION_ARM(EMITTER, ALU ## I)), \
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DO_8(DECLARE_INSTRUCTION_ARM(EMITTER, ALU ## I))
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@ -533,7 +511,7 @@ DEFINE_INSTRUCTION_ARM(SWI,)
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#define DECLARE_ARM_SWI_BLOCK(EMITTER) \
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DO_256(DECLARE_INSTRUCTION_ARM(EMITTER, SWI))
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#define DECLARE_EMITTER_BLOCK(EMITTER) \
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#define DECLARE_ARM_EMITTER_BLOCK(EMITTER) \
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DECLARE_ARM_ALU_BLOCK(EMITTER, AND, MUL, STRH, ILL, ILL), \
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DECLARE_ARM_ALU_BLOCK(EMITTER, ANDS, MULS, LDRH, LDRSB, LDRSH), \
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DECLARE_ARM_ALU_BLOCK(EMITTER, EOR, MLA, ILL, ILL, ILL), \
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@ -747,5 +725,5 @@ DEFINE_INSTRUCTION_ARM(SWI,)
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DECLARE_ARM_SWI_BLOCK(EMITTER)
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static const ARMInstruction _armTable[0x1000] = {
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DECLARE_EMITTER_BLOCK(_ARMInstruction)
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DECLARE_ARM_EMITTER_BLOCK(_ARMInstruction)
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};
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@ -1,6 +1,28 @@
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#ifndef ISA_INLINES_H
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#define ISA_INLINES_H
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#define UNUSED(V) (void)(V)
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#define DO_8(DIRECTIVE) \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE, \
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DIRECTIVE
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#define DO_256(DIRECTIVE) \
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DO_8(DO_8(DIRECTIVE)), \
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DO_8(DO_8(DIRECTIVE)), \
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DO_8(DO_8(DIRECTIVE)), \
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DO_8(DO_8(DIRECTIVE))
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#define DO_INTERLACE(LEFT, RIGHT) \
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LEFT, \
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RIGHT
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#define ARM_COND_EQ (cpu->cpsr.z)
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#define ARM_COND_NE (!cpu->cpsr.z)
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#define ARM_COND_CS (cpu->cpsr.c)
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@ -0,0 +1,66 @@
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#include "isa-thumb.h"
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static const ThumbInstruction _thumbTable[0x400];
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// Instruction definitions
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#define APPLY(F, ...) F(__VA_ARGS__)
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#define DUMMY(...) __VA_ARGS__
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#define COUNT_1(EMITTER, PREFIX, ...) \
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EMITTER(PREFIX ## 0, __VA_ARGS__) \
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EMITTER(PREFIX ## 1, __VA_ARGS__)
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#define COUNT_2(EMITTER, PREFIX, ...) \
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COUNT_1(EMITTER, PREFIX, __VA_ARGS__) \
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EMITTER(PREFIX ## 2, __VA_ARGS__) \
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EMITTER(PREFIX ## 3, __VA_ARGS__)
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#define COUNT_3(EMITTER, PREFIX, ...) \
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COUNT_2(EMITTER, PREFIX, __VA_ARGS__) \
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EMITTER(PREFIX ## 4, __VA_ARGS__) \
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EMITTER(PREFIX ## 5, __VA_ARGS__) \
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EMITTER(PREFIX ## 6, __VA_ARGS__) \
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EMITTER(PREFIX ## 7, __VA_ARGS__)
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#define COUNT_4(EMITTER, PREFIX, ...) \
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COUNT_3(EMITTER, PREFIX, __VA_ARGS__) \
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EMITTER(PREFIX ## 8, __VA_ARGS__) \
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EMITTER(PREFIX ## 9, __VA_ARGS__) \
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EMITTER(PREFIX ## A, __VA_ARGS__) \
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EMITTER(PREFIX ## B, __VA_ARGS__) \
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EMITTER(PREFIX ## C, __VA_ARGS__) \
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EMITTER(PREFIX ## D, __VA_ARGS__) \
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EMITTER(PREFIX ## E, __VA_ARGS__) \
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EMITTER(PREFIX ## F, __VA_ARGS__)
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#define COUNT_5(EMITTER, PREFIX, ...) \
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COUNT_4(EMITTER, PREFIX ## 0, __VA_ARGS__) \
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COUNT_4(EMITTER, PREFIX ## 1, __VA_ARGS__)
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#define THUMB_WRITE_PC \
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cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_THUMB) + WORD_SIZE_THUMB
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#define DEFINE_INSTRUCTION_THUMB(NAME, BODY) \
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static void _ThumbInstruction ## NAME (struct ARMCore* cpu, uint16_t opcode) { \
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BODY; \
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}
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#define DEFINE_SHIFT_INSTRUCTION_THUMB(NAME, BODY) \
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COUNT_5(DEFINE_INSTRUCTION_THUMB, NAME ## _, BODY)
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DEFINE_SHIFT_INSTRUCTION_THUMB(LSL, )
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DEFINE_SHIFT_INSTRUCTION_THUMB(LSR, )
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DEFINE_SHIFT_INSTRUCTION_THUMB(ASR, )
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#define DECLARE_INSTRUCTION_THUMB(EMITTER, NAME) \
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EMITTER ## NAME
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#define DECLARE_THUMB_EMITTER_BLOCK(EMITTER) \
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APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LSL_)) \
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APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LSR_)) \
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APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ASR_)) \
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static const ThumbInstruction _thumbTable[0x400] = {
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DECLARE_THUMB_EMITTER_BLOCK(_ThumbInstruction)
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};
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@ -0,0 +1,11 @@
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#ifndef ISA_THUMB_H
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#define ISA_THUMB_H
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#include <stdint.h>
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struct ARMCore;
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void ThumbStep(struct ARMCore* cpu);
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typedef void (*ThumbInstruction)(struct ARMCore*, uint16_t opcode);
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#endif
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