mirror of https://github.com/mgba-emu/mgba.git
Python: Fold in cinema
This commit is contained in:
Vicki Pfau
parent
bb6728558d
commit
73d37a2a37
1
CHANGES
1
CHANGES
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@ -41,6 +41,7 @@ Misc:
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- Qt: Redo GameController into multiple classes
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- SDL: Fix 2.0.5 build on macOS under some circumstances
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- Test: Restructure test suite into multiple executables
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- Python: Integrate tests from cinema test suite
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0.6.0: (2017-07-16)
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Features:
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@ -0,0 +1,5 @@
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/build
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/dist
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.eggs
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.cache
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*.egg-info*
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@ -35,3 +35,10 @@ set_target_properties(${BINARY_NAME}-pylib PROPERTIES COMPILE_DEFINITIONS "${OS_
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set(PYTHON_LIBRARY ${BINARY_NAME}-pylib PARENT_SCOPE)
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add_custom_target(${BINARY_NAME}-py ALL DEPENDS ${BINARY_NAME}-pylib ${CMAKE_CURRENT_BINARY_DIR}/build/lib/${BINARY_NAME}/__init__.py)
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file(GLOB TESTS ${CMAKE_CURRENT_SOURCE_DIR}/test_*.py)
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foreach(TEST IN LISTS TESTS)
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string(REPLACE "${CMAKE_CURRENT_SOURCE_DIR}/test_" "" TEST_NAME "${TEST}")
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string(REPLACE ".py" "" TEST_NAME "${TEST_NAME}")
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add_test(python-${TEST_NAME} pytest ${TEST})
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endforeach()
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@ -12,8 +12,11 @@ bindir = os.environ.get("BINDIR", os.path.join(os.getcwd(), ".."))
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cpp = shlex.split(os.environ.get("CPP", "cc -E"))
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cppflags = shlex.split(os.environ.get("CPPFLAGS", ""))
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ldflags = shlex.split(os.environ.get("LDFLAGS", ""))
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if __name__ == "__main__":
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cppflags.extend(sys.argv[1:])
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if sys.platform == 'darwin':
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ldflags.append('-Wl,-rpath,' + bindir)
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cppflags.extend(["-I" + incdir, "-I" + srcdir, "-I" + bindir])
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ffi.set_source("mgba._pylib", """
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@ -46,6 +49,7 @@ ffi.set_source("mgba._pylib", """
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#undef PYEXPORT
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""", include_dirs=[incdir, srcdir],
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extra_compile_args=cppflags,
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extra_link_args=ldflags,
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libraries=["mgba"],
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library_dirs=[bindir],
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sources=[os.path.join(pydir, path) for path in ["vfs-py.c", "core.c", "log.c", "sio.c"]])
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@ -0,0 +1,23 @@
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from PIL.ImageChops import difference
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from PIL.ImageOps import autocontrast
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from PIL.Image import open as PIOpen
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class VideoFrame(object):
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def __init__(self, pilImage):
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self.image = pilImage.convert('RGB')
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@staticmethod
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def diff(a, b):
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diff = difference(a.image, b.image)
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diffNormalized = autocontrast(diff)
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return (VideoFrame(diff), VideoFrame(diffNormalized))
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@staticmethod
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def load(path):
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with open(path, 'rb') as f:
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image = PIOpen(f)
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image.load()
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return VideoFrame(image)
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def save(self, path):
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return self.image.save(path)
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@ -0,0 +1,47 @@
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from mgba.image import Image
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from collections import namedtuple
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from . import VideoFrame
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Output = namedtuple('Output', ['video'])
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class Tracer(object):
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def __init__(self, core):
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self.core = core
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self.fb = Image(*core.desiredVideoDimensions())
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self.core.setVideoBuffer(self.fb)
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self._videoFifo = []
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def yieldFrames(self, skip=0, limit=None):
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self.core.reset()
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skip = (skip or 0) + 1
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while skip > 0:
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frame = self.core.frameCounter
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self.core.runFrame()
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skip -= 1
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while frame <= self.core.frameCounter and limit != 0:
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self._videoFifo.append(VideoFrame(self.fb.toPIL()))
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yield frame
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frame = self.core.frameCounter
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self.core.runFrame()
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if limit is not None:
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assert limit >= 0
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limit -= 1
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def video(self, generator=None, **kwargs):
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if not generator:
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generator = self.yieldFrames(**kwargs)
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try:
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while True:
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if self._videoFifo:
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result = self._videoFifo[0]
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self._videoFifo = self._videoFifo[1:]
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yield result
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else:
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next(generator)
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except StopIteration:
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return
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def output(self, **kwargs):
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generator = self.yieldFrames(**kwargs)
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return mCoreOutput(video=self.video(generator=generator, **kwargs))
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@ -0,0 +1,96 @@
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import os, os.path
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import mgba.core, mgba.image
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import cinema.movie
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import itertools
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import glob
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import re
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import yaml
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from copy import deepcopy
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from cinema import VideoFrame
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from cinema.util import dictMerge
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class CinemaTest(object):
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TEST = 'test.(mvl|gb|gba|nds)'
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def __init__(self, path, root, settings={}):
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self.fullPath = path or []
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self.path = os.path.abspath(os.path.join(root, *self.fullPath))
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self.root = root
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self.name = '.'.join(path)
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self.settings = settings
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try:
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with open(os.path.join(self.path, 'manifest.yml'), 'r') as f:
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dictMerge(self.settings, yaml.safe_load(f))
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except FileNotFoundError:
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pass
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self.tests = {}
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def __repr__(self):
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return '<%s %s>' % (self.__class__.__name__, self.name)
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def setUp(self):
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results = [f for f in glob.glob(os.path.join(self.path, 'test.*')) if re.search(self.TEST, f)]
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self.core = mgba.core.loadPath(results[0])
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if 'config' in self.settings:
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self.config = mgba.core.Config(defaults=self.settings['config'])
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self.core.loadConfig(self.config)
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self.core.reset()
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def addTest(self, name, cls=None, settings={}):
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cls = cls or self.__class__
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newSettings = deepcopy(self.settings)
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dictMerge(newSettings, settings)
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self.tests[name] = cls(self.fullPath + [name], self.root, newSettings)
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return self.tests[name]
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def outputSettings(self):
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outputSettings = {}
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if 'frames' in self.settings:
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outputSettings['limit'] = self.settings['frames']
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if 'skip' in self.settings:
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outputSettings['skip'] = self.settings['skip']
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return outputSettings
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def __lt__(self, other):
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return self.path < other.path
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class VideoTest(CinemaTest):
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BASELINE = 'baseline_%04u.png'
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def setUp(self):
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super(VideoTest, self).setUp();
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self.tracer = cinema.movie.Tracer(self.core)
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def generateFrames(self):
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for i, frame in zip(itertools.count(), self.tracer.video(**self.outputSettings())):
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try:
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baseline = VideoFrame.load(os.path.join(self.path, self.BASELINE % i))
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yield baseline, frame, VideoFrame.diff(baseline, frame)
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except FileNotFoundError:
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yield None, frame, (None, None)
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def test(self):
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self.baseline, self.frames, self.diffs = zip(*self.generateFrames())
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assert not any(any(diffs[0].image.convert("L").point(bool).getdata()) for diffs in self.diffs)
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def generateBaseline(self):
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for i, frame in zip(itertools.count(), self.tracer.video(**self.outputSettings())):
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frame.save(os.path.join(self.path, self.BASELINE % i))
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def gatherTests(root=os.getcwd()):
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tests = CinemaTest([], root)
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for path, _, files in os.walk(root):
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test = [f for f in files if re.match(CinemaTest.TEST, f)]
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if not test:
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continue
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prefix = os.path.commonpath([path, root])
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suffix = path[len(prefix)+1:]
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testPath = suffix.split(os.sep)
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testRoot = tests
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for component in testPath[:-1]:
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newTest = testRoot.tests.get(component)
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if not newTest:
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newTest = testRoot.addTest(component)
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testRoot = newTest
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testRoot.addTest(testPath[-1], VideoTest)
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return tests
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@ -0,0 +1,9 @@
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def dictMerge(a, b):
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for key, value in b.items():
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if isinstance(value, dict):
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if key in a:
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dictMerge(a[key], value)
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else:
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a[key] = dict(value)
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else:
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a[key] = value
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@ -0,0 +1,49 @@
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import errno
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import itertools
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import os
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import os.path
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import pytest
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import yaml
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def pytest_addoption(parser):
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parser.addoption("--rebaseline", action="store_true", help="output a new baseline instead of testing")
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parser.addoption("--mark-failing", action="store_true", help="mark all failing tests as failing")
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parser.addoption("--mark-succeeding", action="store_true", help="unmark all succeeding tests marked as failing")
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parser.addoption("--output-diff", help="output diffs for failed tests to directory")
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EXPECTED = 'expected_%04u.png'
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RESULT = 'result_%04u.png'
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DIFF = 'diff_%04u.png'
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DIFF_NORM = 'diff_norm_%04u.png'
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def pytest_exception_interact(node, call, report):
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outroot = node.config.getoption("--output-diff")
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if report.failed and hasattr(node, 'funcargs'):
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vtest = node.funcargs.get('vtest')
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if outroot:
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if not vtest:
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return
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outdir = os.path.join(outroot, *vtest.fullPath)
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try:
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os.makedirs(outdir)
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except OSError as e:
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if e.errno == errno.EEXIST and os.path.isdir(outdir):
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pass
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else:
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raise
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for i, expected, result, diff, diffNorm in zip(itertools.count(), vtest.baseline, vtest.frames, *zip(*vtest.diffs)):
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result.save(os.path.join(outdir, RESULT % i))
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if expected:
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expected.save(os.path.join(outdir, EXPECTED % i))
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diff.save(os.path.join(outdir, DIFF % i))
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diffNorm.save(os.path.join(outdir, DIFF_NORM % i))
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if node.config.getoption("--mark-failing"):
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try:
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with open(os.path.join(vtest.path, 'manifest.yml'), 'r') as f:
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settings = yaml.safe_load(f)
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except FileNotFoundError:
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settings = {}
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settings['fail'] = True
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with open(os.path.join(vtest.path, 'manifest.yml'), 'w') as f:
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yaml.dump(settings, f, default_flow_style=False)
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@ -0,0 +1,2 @@
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[aliases]
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test=pytest
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@ -1,6 +1,7 @@
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from setuptools import setup
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import re
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import os
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import sys
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os.environ["BINDIR"] = "${CMAKE_BINARY_DIR}"
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os.environ["CPPFLAGS"] = " ".join([d for d in "${INCLUDE_FLAGS}".split(";") if d])
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@ -21,9 +22,10 @@ setup(name="${BINARY_NAME}",
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author_email="jeffrey@endrift.com",
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url="http://github.com/mgba-emu/mgba/",
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packages=["mgba"],
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setup_requires=['cffi>=1.6'],
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setup_requires=['cffi>=1.6', 'pytest-runner'],
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install_requires=['cffi>=1.6', 'cached-property'],
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extras_require={'pil': ['Pillow>=2.3']},
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extras_require={'pil': ['Pillow>=2.3'], 'cinema': ['pyyaml', 'pytest']},
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tests_require=['mgba[cinema]', 'pytest'],
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cffi_modules=["_builder.py:ffi"],
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license="MPL 2.0",
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classifiers=classifiers
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@ -0,0 +1,61 @@
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import pytest
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import cinema.test
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import mgba.log
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import os.path
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import yaml
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mgba.log.installDefault(mgba.log.NullLogger())
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def flatten(d):
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l = []
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for k, v in d.tests.items():
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if v.tests:
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l.extend(flatten(v))
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else:
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l.append(v)
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l.sort()
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return l
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def pytest_generate_tests(metafunc):
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if 'vtest' in metafunc.fixturenames:
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tests = cinema.test.gatherTests(os.path.join(os.path.dirname(__file__), 'tests/cinema'))
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testList = flatten(tests)
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params = []
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for test in testList:
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marks = []
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xfail = test.settings.get('fail')
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if xfail:
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marks = pytest.mark.xfail(reason=xfail if isinstance(xfail, str) else None)
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params.append(pytest.param(test, id=test.name, marks=marks))
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metafunc.parametrize('vtest', params, indirect=True)
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@pytest.fixture
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def vtest(request):
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return request.param
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def test_video(vtest, pytestconfig):
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vtest.setUp()
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if pytestconfig.getoption('--rebaseline'):
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vtest.generateBaseline()
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else:
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try:
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vtest.test()
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except FileNotFoundError:
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raise
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if pytestconfig.getoption('--mark-succeeding') and 'fail' in vtest.settings:
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# TODO: This can fail if an entire directory is marked as failing
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settings = {}
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try:
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with open(os.path.join(vtest.path, 'manifest.yml'), 'r') as f:
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settings = yaml.safe_load(f)
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except FileNotFoundError:
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pass
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if 'fail' in settings:
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del settings['fail']
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else:
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settings['fail'] = False
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if settings:
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with open(os.path.join(vtest.path, 'manifest.yml'), 'w') as f:
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yaml.dump(settings, f, default_flow_style=False)
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else:
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os.remove(os.path.join(vtest.path, 'manifest.yml'))
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@ -0,0 +1,19 @@
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Copyright (c) 2014-2017 Joonas Javanainen <joonas.javanainen@gmail.com>
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
|
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
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copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in all
|
||||
copies or substantial portions of the Software.
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||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
SOFTWARE.
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Binary file not shown.
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After Width: | Height: | Size: 1.2 KiB |
Binary file not shown.
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@ -0,0 +1,206 @@
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; this file was created with wlalink by ville helin <vhelin@iki.fi>.
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; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/add_sp_e_timing.gb".
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[labels]
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01:4bff print_load_font
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01:4c0c print_string
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01:4c16 print_a
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01:4c20 print_newline
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01:4c2b print_digit
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01:4c38 print_regs
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01:4c41 _print_sl_data0
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01:4c47 _print_sl_out0
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01:4c54 _print_sl_data1
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01:4c5a _print_sl_out1
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01:4c6c _print_sl_data2
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01:4c72 _print_sl_out2
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01:4c7f _print_sl_data3
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01:4c85 _print_sl_out3
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01:4c97 _print_sl_data4
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01:4c9d _print_sl_out4
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01:4caa _print_sl_data5
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01:4cb0 _print_sl_out5
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01:4cc2 _print_sl_data6
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01:4cc8 _print_sl_out6
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01:4cd5 _print_sl_data7
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01:4cdb _print_sl_out7
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01:4000 font
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00:c000 regs_save
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00:c000 regs_save.f
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00:c001 regs_save.a
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00:c002 regs_save.c
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00:c003 regs_save.b
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00:c004 regs_save.e
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00:c005 regs_save.d
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00:c006 regs_save.l
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00:c007 regs_save.h
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00:c008 regs_flags
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00:c009 regs_assert
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00:c009 regs_assert.f
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00:c00a regs_assert.a
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00:c00b regs_assert.c
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00:c00c regs_assert.b
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00:c00d regs_assert.e
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00:c00e regs_assert.d
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00:c00f regs_assert.l
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00:c010 regs_assert.h
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00:c011 memdump_len
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00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0150 _wait_ly_4
|
||||
00:0156 _wait_ly_5
|
||||
00:0180 test_finish
|
||||
00:01c4 wram_test
|
||||
00:01d3 hiram_test
|
||||
00:01d3 test_round1
|
||||
00:01d5 _wait_ly_6
|
||||
00:01db _wait_ly_7
|
||||
00:01f0 finish_round1
|
||||
00:01ff test_round2
|
||||
00:0201 _wait_ly_8
|
||||
00:0207 _wait_ly_9
|
||||
00:021d finish_round2
|
||||
00:c014 result_tmp
|
||||
00:c016 result_round1
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 518 B |
Binary file not shown.
|
|
@ -0,0 +1,212 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/bits/mem_oam.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:016f test_finish
|
||||
00:0183 _wait_ly_4
|
||||
00:0189 _wait_ly_5
|
||||
00:019f _print_results_halt_1
|
||||
00:01a2 _test_ok_cb_0
|
||||
00:01aa _print_sl_data55
|
||||
00:01b2 _print_sl_out55
|
||||
00:01b5 fail_1
|
||||
00:01c9 _wait_ly_6
|
||||
00:01cf _wait_ly_7
|
||||
00:01e5 _print_results_halt_2
|
||||
00:01e8 _test_failure_cb_0
|
||||
00:01f0 _print_sl_data56
|
||||
00:01fd _print_sl_out56
|
||||
00:0200 fail_0
|
||||
00:0214 _wait_ly_8
|
||||
00:021a _wait_ly_9
|
||||
00:0230 _print_results_halt_3
|
||||
00:0233 _test_failure_cb_1
|
||||
00:023b _print_sl_data57
|
||||
00:0248 _print_sl_out57
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.1 KiB |
Binary file not shown.
|
|
@ -0,0 +1,192 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/bits/reg_f.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0160 test_finish
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 518 B |
Binary file not shown.
|
|
@ -0,0 +1,535 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/bits/unused_hwio-GS.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c017 regs_save
|
||||
00:c017 regs_save.f
|
||||
00:c018 regs_save.a
|
||||
00:c019 regs_save.c
|
||||
00:c01a regs_save.b
|
||||
00:c01b regs_save.e
|
||||
00:c01c regs_save.d
|
||||
00:c01d regs_save.l
|
||||
00:c01e regs_save.h
|
||||
00:c01f regs_flags
|
||||
00:c020 regs_assert
|
||||
00:c020 regs_assert.f
|
||||
00:c021 regs_assert.a
|
||||
00:c022 regs_assert.c
|
||||
00:c023 regs_assert.b
|
||||
00:c024 regs_assert.e
|
||||
00:c025 regs_assert.d
|
||||
00:c026 regs_assert.l
|
||||
00:c027 regs_assert.h
|
||||
00:c028 memdump_len
|
||||
00:c029 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0161 _test_data_0
|
||||
00:0177 _finish_0
|
||||
00:0187 _test_data_1
|
||||
00:019d _finish_1
|
||||
00:01ad _test_data_2
|
||||
00:01c3 _finish_2
|
||||
00:01d3 _test_data_3
|
||||
00:01e9 _finish_3
|
||||
00:01f9 _test_data_4
|
||||
00:020f _finish_4
|
||||
00:021f _test_data_5
|
||||
00:0235 _finish_5
|
||||
00:0245 _test_data_6
|
||||
00:025b _finish_6
|
||||
00:026b _test_data_7
|
||||
00:0281 _finish_7
|
||||
00:0291 _test_data_8
|
||||
00:02a7 _finish_8
|
||||
00:02b7 _test_data_9
|
||||
00:02cd _finish_9
|
||||
00:02dd _test_data_10
|
||||
00:02f3 _finish_10
|
||||
00:0303 _test_data_11
|
||||
00:0319 _finish_11
|
||||
00:0329 _test_data_12
|
||||
00:033f _finish_12
|
||||
00:034f _test_data_13
|
||||
00:0365 _finish_13
|
||||
00:0375 _test_data_14
|
||||
00:038b _finish_14
|
||||
00:039b _test_data_15
|
||||
00:03b1 _finish_15
|
||||
00:03c1 _test_data_16
|
||||
00:03d7 _finish_16
|
||||
00:03e7 _test_data_17
|
||||
00:03fd _finish_17
|
||||
00:040d _test_data_18
|
||||
00:0423 _finish_18
|
||||
00:0433 _test_data_19
|
||||
00:0449 _finish_19
|
||||
00:0459 _test_data_20
|
||||
00:046f _finish_20
|
||||
00:047f _test_data_21
|
||||
00:0495 _finish_21
|
||||
00:04a5 _test_data_22
|
||||
00:04bb _finish_22
|
||||
00:04cb _test_data_23
|
||||
00:04e1 _finish_23
|
||||
00:04f1 _test_data_24
|
||||
00:0507 _finish_24
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
00:17a5 _test_data_150
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||||
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||||
00:17cb _test_data_151
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||||
00:17e1 _finish_151
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||||
00:17f1 _test_data_152
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||||
00:1807 _finish_152
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||||
00:1817 _test_data_153
|
||||
00:182d _finish_153
|
||||
00:1841 _wait_ly_4
|
||||
00:1847 _wait_ly_5
|
||||
00:185d _print_results_halt_1
|
||||
00:1860 _test_ok_cb_0
|
||||
00:1868 _print_sl_data55
|
||||
00:1870 _print_sl_out55
|
||||
00:1873 run_testcase
|
||||
00:189e _wait_ly_6
|
||||
00:18a4 _wait_ly_7
|
||||
00:18ba _print_results_halt_2
|
||||
00:18bd test_failure_cb
|
||||
00:18c5 _print_sl_data56
|
||||
00:18d1 _print_sl_out56
|
||||
00:18df _print_sl_data57
|
||||
00:18e3 _print_sl_out57
|
||||
00:18f1 _print_sl_data58
|
||||
00:1901 _print_sl_out58
|
||||
00:190f _print_sl_data59
|
||||
00:191c _print_sl_out59
|
||||
00:192d _print_sl_data60
|
||||
00:193a _print_sl_out60
|
||||
00:194b _print_sl_data61
|
||||
00:1958 _print_sl_out61
|
||||
00:195e fetch_test_data
|
||||
00:1978 print_got
|
||||
00:198a _print_zero
|
||||
00:198e _print_one
|
||||
00:1990 _print_bit
|
||||
00:1999 _skip
|
||||
00:199a _next
|
||||
00:c000 test_addr
|
||||
00:c002 test_got
|
||||
00:c003 test_reg
|
||||
00:c004 test_mask
|
||||
00:c005 test_str_write
|
||||
00:c00e test_str_expect
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 518 B |
|
|
@ -0,0 +1 @@
|
|||
config: {gb.model: SGB}
|
||||
Binary file not shown.
|
|
@ -0,0 +1,212 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_hwio-S.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:01e6 _wait_ly_4
|
||||
00:01ec _wait_ly_5
|
||||
00:0202 _print_results_halt_1
|
||||
00:0205 _test_ok_cb_0
|
||||
00:020d _print_sl_data55
|
||||
00:0215 _print_sl_out55
|
||||
00:0218 mismatch
|
||||
00:023b _wait_ly_6
|
||||
00:0241 _wait_ly_7
|
||||
00:0257 _print_results_halt_2
|
||||
00:025a mismatch_cb
|
||||
00:0262 _print_sl_data56
|
||||
00:0270 _print_sl_out56
|
||||
00:028a _print_sl_data57
|
||||
00:0294 _print_sl_out57
|
||||
00:02a5 _print_sl_data58
|
||||
00:02af _print_sl_out58
|
||||
00:02b8 hwio_data
|
||||
00:c014 mismatch_addr
|
||||
00:c016 mismatch_data
|
||||
00:c017 mismatch_mem
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 518 B |
|
|
@ -0,0 +1 @@
|
|||
fail: true
|
||||
Binary file not shown.
|
|
@ -0,0 +1,212 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_hwio-dmg0.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:01e6 _wait_ly_4
|
||||
00:01ec _wait_ly_5
|
||||
00:0202 _print_results_halt_1
|
||||
00:0205 _test_ok_cb_0
|
||||
00:020d _print_sl_data55
|
||||
00:0215 _print_sl_out55
|
||||
00:0218 mismatch
|
||||
00:023b _wait_ly_6
|
||||
00:0241 _wait_ly_7
|
||||
00:0257 _print_results_halt_2
|
||||
00:025a mismatch_cb
|
||||
00:0262 _print_sl_data56
|
||||
00:0270 _print_sl_out56
|
||||
00:028a _print_sl_data57
|
||||
00:0294 _print_sl_out57
|
||||
00:02a5 _print_sl_data58
|
||||
00:02af _print_sl_out58
|
||||
00:02b8 hwio_data
|
||||
00:c014 mismatch_addr
|
||||
00:c016 mismatch_data
|
||||
00:c017 mismatch_mem
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 518 B |
Binary file not shown.
|
|
@ -0,0 +1,212 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_hwio-dmgABCXmgb.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:01e6 _wait_ly_4
|
||||
00:01ec _wait_ly_5
|
||||
00:0202 _print_results_halt_1
|
||||
00:0205 _test_ok_cb_0
|
||||
00:020d _print_sl_data55
|
||||
00:0215 _print_sl_out55
|
||||
00:0218 mismatch
|
||||
00:023b _wait_ly_6
|
||||
00:0241 _wait_ly_7
|
||||
00:0257 _print_results_halt_2
|
||||
00:025a mismatch_cb
|
||||
00:0262 _print_sl_data56
|
||||
00:0270 _print_sl_out56
|
||||
00:028a _print_sl_data57
|
||||
00:0294 _print_sl_out57
|
||||
00:02a5 _print_sl_data58
|
||||
00:02af _print_sl_out58
|
||||
00:02b8 hwio_data
|
||||
00:c014 mismatch_addr
|
||||
00:c016 mismatch_data
|
||||
00:c017 mismatch_mem
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.3 KiB |
Binary file not shown.
|
|
@ -0,0 +1,198 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/jeffrey/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-dmg.gb".
|
||||
|
||||
[labels]
|
||||
0001:4bf2 print_load_font
|
||||
0001:4bff print_string
|
||||
0001:4c09 print_a
|
||||
0001:4c13 print_newline
|
||||
0001:4c1e print_digit
|
||||
0001:4c2b print_regs
|
||||
0001:4c34 _print_sl_data0
|
||||
0001:4c3a _print_sl_out0
|
||||
0001:4c47 _print_sl_data1
|
||||
0001:4c4d _print_sl_out1
|
||||
0001:4c5f _print_sl_data2
|
||||
0001:4c65 _print_sl_out2
|
||||
0001:4c72 _print_sl_data3
|
||||
0001:4c78 _print_sl_out3
|
||||
0001:4c8a _print_sl_data4
|
||||
0001:4c90 _print_sl_out4
|
||||
0001:4c9d _print_sl_data5
|
||||
0001:4ca3 _print_sl_out5
|
||||
0001:4cb5 _print_sl_data6
|
||||
0001:4cbb _print_sl_out6
|
||||
0001:4cc8 _print_sl_data7
|
||||
0001:4cce _print_sl_out7
|
||||
0001:4000 font
|
||||
0000:c000 regs_save
|
||||
0000:c000 regs_save.f
|
||||
0000:c001 regs_save.a
|
||||
0000:c002 regs_save.c
|
||||
0000:c003 regs_save.b
|
||||
0000:c004 regs_save.e
|
||||
0000:c005 regs_save.d
|
||||
0000:c006 regs_save.l
|
||||
0000:c007 regs_save.h
|
||||
0000:c008 regs_flags
|
||||
0000:c009 regs_assert
|
||||
0000:c009 regs_assert.f
|
||||
0000:c00a regs_assert.a
|
||||
0000:c00b regs_assert.c
|
||||
0000:c00c regs_assert.b
|
||||
0000:c00d regs_assert.e
|
||||
0000:c00e regs_assert.d
|
||||
0000:c00f regs_assert.l
|
||||
0000:c010 regs_assert.h
|
||||
0000:c011 memdump_len
|
||||
0000:c012 memdump_addr
|
||||
0001:47f0 memcpy
|
||||
0001:47f9 memset
|
||||
0001:4802 clear_vram
|
||||
0001:480d reset_screen
|
||||
0001:481a process_results
|
||||
0001:481f _wait_ly_0
|
||||
0001:4825 _wait_ly_1
|
||||
0001:4841 _wait_ly_2
|
||||
0001:4847 _wait_ly_3
|
||||
0001:4860 _process_results_cb
|
||||
0001:486b _print_sl_data8
|
||||
0001:4875 _print_sl_out8
|
||||
0001:488f _print_sl_data9
|
||||
0001:489a _print_sl_out9
|
||||
0001:48b2 _print_sl_data10
|
||||
0001:48be _print_sl_out10
|
||||
0001:48bf dump_mem
|
||||
0001:48cf _wait_ly_4
|
||||
0001:48d5 _wait_ly_5
|
||||
0001:48f1 _dump_mem_line
|
||||
0001:491b _check_asserts
|
||||
0001:4929 _print_sl_data11
|
||||
0001:492c _print_sl_out11
|
||||
0001:4938 _print_sl_data12
|
||||
0001:493a _print_sl_out12
|
||||
0001:4942 _print_sl_data13
|
||||
0001:4945 _print_sl_out13
|
||||
0001:494f __check_assert_fail0
|
||||
0001:495a _print_sl_data14
|
||||
0001:495d _print_sl_out14
|
||||
0001:4960 __check_assert_ok0
|
||||
0001:4968 _print_sl_data15
|
||||
0001:496d _print_sl_out15
|
||||
0001:496f __check_assert_skip0
|
||||
0001:4977 _print_sl_data16
|
||||
0001:497f _print_sl_out16
|
||||
0001:497f __check_assert_out0
|
||||
0001:498b _print_sl_data17
|
||||
0001:498d _print_sl_out17
|
||||
0001:4995 _print_sl_data18
|
||||
0001:4998 _print_sl_out18
|
||||
0001:49a2 __check_assert_fail1
|
||||
0001:49ad _print_sl_data19
|
||||
0001:49b0 _print_sl_out19
|
||||
0001:49b3 __check_assert_ok1
|
||||
0001:49bb _print_sl_data20
|
||||
0001:49c0 _print_sl_out20
|
||||
0001:49c2 __check_assert_skip1
|
||||
0001:49ca _print_sl_data21
|
||||
0001:49d2 _print_sl_out21
|
||||
0001:49d2 __check_assert_out1
|
||||
0001:49dd _print_sl_data22
|
||||
0001:49e0 _print_sl_out22
|
||||
0001:49ec _print_sl_data23
|
||||
0001:49ee _print_sl_out23
|
||||
0001:49f6 _print_sl_data24
|
||||
0001:49f9 _print_sl_out24
|
||||
0001:4a03 __check_assert_fail2
|
||||
0001:4a0e _print_sl_data25
|
||||
0001:4a11 _print_sl_out25
|
||||
0001:4a14 __check_assert_ok2
|
||||
0001:4a1c _print_sl_data26
|
||||
0001:4a21 _print_sl_out26
|
||||
0001:4a23 __check_assert_skip2
|
||||
0001:4a2b _print_sl_data27
|
||||
0001:4a33 _print_sl_out27
|
||||
0001:4a33 __check_assert_out2
|
||||
0001:4a3f _print_sl_data28
|
||||
0001:4a41 _print_sl_out28
|
||||
0001:4a49 _print_sl_data29
|
||||
0001:4a4c _print_sl_out29
|
||||
0001:4a56 __check_assert_fail3
|
||||
0001:4a61 _print_sl_data30
|
||||
0001:4a64 _print_sl_out30
|
||||
0001:4a67 __check_assert_ok3
|
||||
0001:4a6f _print_sl_data31
|
||||
0001:4a74 _print_sl_out31
|
||||
0001:4a76 __check_assert_skip3
|
||||
0001:4a7e _print_sl_data32
|
||||
0001:4a86 _print_sl_out32
|
||||
0001:4a86 __check_assert_out3
|
||||
0001:4a91 _print_sl_data33
|
||||
0001:4a94 _print_sl_out33
|
||||
0001:4aa0 _print_sl_data34
|
||||
0001:4aa2 _print_sl_out34
|
||||
0001:4aaa _print_sl_data35
|
||||
0001:4aad _print_sl_out35
|
||||
0001:4ab7 __check_assert_fail4
|
||||
0001:4ac2 _print_sl_data36
|
||||
0001:4ac5 _print_sl_out36
|
||||
0001:4ac8 __check_assert_ok4
|
||||
0001:4ad0 _print_sl_data37
|
||||
0001:4ad5 _print_sl_out37
|
||||
0001:4ad7 __check_assert_skip4
|
||||
0001:4adf _print_sl_data38
|
||||
0001:4ae7 _print_sl_out38
|
||||
0001:4ae7 __check_assert_out4
|
||||
0001:4af3 _print_sl_data39
|
||||
0001:4af5 _print_sl_out39
|
||||
0001:4afd _print_sl_data40
|
||||
0001:4b00 _print_sl_out40
|
||||
0001:4b0a __check_assert_fail5
|
||||
0001:4b15 _print_sl_data41
|
||||
0001:4b18 _print_sl_out41
|
||||
0001:4b1b __check_assert_ok5
|
||||
0001:4b23 _print_sl_data42
|
||||
0001:4b28 _print_sl_out42
|
||||
0001:4b2a __check_assert_skip5
|
||||
0001:4b32 _print_sl_data43
|
||||
0001:4b3a _print_sl_out43
|
||||
0001:4b3a __check_assert_out5
|
||||
0001:4b45 _print_sl_data44
|
||||
0001:4b48 _print_sl_out44
|
||||
0001:4b54 _print_sl_data45
|
||||
0001:4b56 _print_sl_out45
|
||||
0001:4b5e _print_sl_data46
|
||||
0001:4b61 _print_sl_out46
|
||||
0001:4b6b __check_assert_fail6
|
||||
0001:4b76 _print_sl_data47
|
||||
0001:4b79 _print_sl_out47
|
||||
0001:4b7c __check_assert_ok6
|
||||
0001:4b84 _print_sl_data48
|
||||
0001:4b89 _print_sl_out48
|
||||
0001:4b8b __check_assert_skip6
|
||||
0001:4b93 _print_sl_data49
|
||||
0001:4b9b _print_sl_out49
|
||||
0001:4b9b __check_assert_out6
|
||||
0001:4ba7 _print_sl_data50
|
||||
0001:4ba9 _print_sl_out50
|
||||
0001:4bb1 _print_sl_data51
|
||||
0001:4bb4 _print_sl_out51
|
||||
0001:4bbe __check_assert_fail7
|
||||
0001:4bc9 _print_sl_data52
|
||||
0001:4bcc _print_sl_out52
|
||||
0001:4bcf __check_assert_ok7
|
||||
0001:4bd7 _print_sl_data53
|
||||
0001:4bdc _print_sl_out53
|
||||
0001:4bde __check_assert_skip7
|
||||
0001:4be6 _print_sl_data54
|
||||
0001:4bee _print_sl_out54
|
||||
0001:4bee __check_assert_out7
|
||||
0000:01d2 invalid_sp
|
||||
0000:01d7 _wait_ly_6
|
||||
0000:01dd _wait_ly_7
|
||||
0000:01f9 _wait_ly_8
|
||||
0000:01ff _wait_ly_9
|
||||
0000:0218 _test_failure_cb_0
|
||||
0000:0220 _print_sl_data55
|
||||
0000:0231 _print_sl_out55
|
||||
0000:c014 sp_save
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.3 KiB |
|
|
@ -0,0 +1 @@
|
|||
fail: true
|
||||
Binary file not shown.
|
|
@ -0,0 +1,199 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-dmg0.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:01d2 invalid_sp
|
||||
00:01e6 _wait_ly_4
|
||||
00:01ec _wait_ly_5
|
||||
00:0202 _print_results_halt_1
|
||||
00:0205 _test_failure_cb_0
|
||||
00:020d _print_sl_data55
|
||||
00:021e _print_sl_out55
|
||||
00:c014 sp_save
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.3 KiB |
Binary file not shown.
|
|
@ -0,0 +1,199 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-dmgABCX.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:01d2 invalid_sp
|
||||
00:01e6 _wait_ly_4
|
||||
00:01ec _wait_ly_5
|
||||
00:0202 _print_results_halt_1
|
||||
00:0205 _test_failure_cb_0
|
||||
00:020d _print_sl_data55
|
||||
00:021e _print_sl_out55
|
||||
00:c014 sp_save
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.3 KiB |
|
|
@ -0,0 +1 @@
|
|||
config: {gb.model: MGB}
|
||||
Binary file not shown.
|
|
@ -0,0 +1,199 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-mgb.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:01d2 invalid_sp
|
||||
00:01e6 _wait_ly_4
|
||||
00:01ec _wait_ly_5
|
||||
00:0202 _print_results_halt_1
|
||||
00:0205 _test_failure_cb_0
|
||||
00:020d _print_sl_data55
|
||||
00:021e _print_sl_out55
|
||||
00:c014 sp_save
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.3 KiB |
|
|
@ -0,0 +1 @@
|
|||
config: {gb.model: SGB}
|
||||
Binary file not shown.
|
|
@ -0,0 +1,199 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-sgb.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:01d2 invalid_sp
|
||||
00:01e6 _wait_ly_4
|
||||
00:01ec _wait_ly_5
|
||||
00:0202 _print_results_halt_1
|
||||
00:0205 _test_failure_cb_0
|
||||
00:020d _print_sl_data55
|
||||
00:021e _print_sl_out55
|
||||
00:c014 sp_save
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.3 KiB |
|
|
@ -0,0 +1 @@
|
|||
config: {gb.model: SGB2}
|
||||
Binary file not shown.
|
|
@ -0,0 +1,199 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/boot_regs-sgb2.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:01d2 invalid_sp
|
||||
00:01e6 _wait_ly_4
|
||||
00:01ec _wait_ly_5
|
||||
00:0202 _print_results_halt_1
|
||||
00:0205 _test_failure_cb_0
|
||||
00:020d _print_sl_data55
|
||||
00:021e _print_sl_out55
|
||||
00:c014 sp_save
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 518 B |
Binary file not shown.
|
|
@ -0,0 +1,223 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_cc_timing.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0151 _wait_ly_4
|
||||
00:0157 _wait_ly_5
|
||||
00:0184 test_finish
|
||||
00:0198 _wait_ly_6
|
||||
00:019e _wait_ly_7
|
||||
00:01b4 _print_results_halt_1
|
||||
00:01b7 _test_ok_cb_0
|
||||
00:01bf _print_sl_data55
|
||||
00:01c7 _print_sl_out55
|
||||
00:01ca wram_test
|
||||
00:01cd fail_round1
|
||||
00:01e1 _wait_ly_8
|
||||
00:01e7 _wait_ly_9
|
||||
00:01fd _print_results_halt_2
|
||||
00:0200 _test_failure_cb_0
|
||||
00:0208 _print_sl_data56
|
||||
00:0216 _print_sl_out56
|
||||
00:0219 fail_round2
|
||||
00:022d _wait_ly_10
|
||||
00:0233 _wait_ly_11
|
||||
00:0249 _print_results_halt_3
|
||||
00:024c _test_failure_cb_1
|
||||
00:0254 _print_sl_data57
|
||||
00:0262 _print_sl_out57
|
||||
00:1f80 hiram_test
|
||||
00:1f87 _wait_ly_12
|
||||
00:1f8d _wait_ly_13
|
||||
00:1fa1 test_round2
|
||||
00:1fa8 _wait_ly_14
|
||||
00:1fae _wait_ly_15
|
||||
00:1fca finish_round1
|
||||
00:1ada finish_round2
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.2 KiB |
Binary file not shown.
|
|
@ -0,0 +1,204 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_cc_timing2.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0151 _wait_ly_4
|
||||
00:0157 _wait_ly_5
|
||||
00:0177 test_finish
|
||||
00:01cf hiram_test
|
||||
00:01d2 _wait_ly_6
|
||||
00:01d8 _wait_ly_7
|
||||
00:01ec finish_round1
|
||||
00:01ed _wait_ly_8
|
||||
00:01f3 _wait_ly_9
|
||||
00:0208 finish_round2
|
||||
00:0209 _wait_ly_10
|
||||
00:020f _wait_ly_11
|
||||
00:0225 finish_round3
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 518 B |
Binary file not shown.
|
|
@ -0,0 +1,223 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_timing.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0151 _wait_ly_4
|
||||
00:0157 _wait_ly_5
|
||||
00:0184 test_finish
|
||||
00:0198 _wait_ly_6
|
||||
00:019e _wait_ly_7
|
||||
00:01b4 _print_results_halt_1
|
||||
00:01b7 _test_ok_cb_0
|
||||
00:01bf _print_sl_data55
|
||||
00:01c7 _print_sl_out55
|
||||
00:01ca wram_test
|
||||
00:01cd fail_round1
|
||||
00:01e1 _wait_ly_8
|
||||
00:01e7 _wait_ly_9
|
||||
00:01fd _print_results_halt_2
|
||||
00:0200 _test_failure_cb_0
|
||||
00:0208 _print_sl_data56
|
||||
00:0216 _print_sl_out56
|
||||
00:0219 fail_round2
|
||||
00:022d _wait_ly_10
|
||||
00:0233 _wait_ly_11
|
||||
00:0249 _print_results_halt_3
|
||||
00:024c _test_failure_cb_1
|
||||
00:0254 _print_sl_data57
|
||||
00:0262 _print_sl_out57
|
||||
00:1f80 hiram_test
|
||||
00:1f87 _wait_ly_12
|
||||
00:1f8d _wait_ly_13
|
||||
00:1fa1 test_round2
|
||||
00:1fa8 _wait_ly_14
|
||||
00:1fae _wait_ly_15
|
||||
00:1fca finish_round1
|
||||
00:1ada finish_round2
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.2 KiB |
Binary file not shown.
|
|
@ -0,0 +1,204 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/call_timing2.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
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|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
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|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
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|
||||
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|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
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|
||||
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|
||||
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|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
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|
||||
01:495c __check_assert_fail0
|
||||
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|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
01:498c __check_assert_out0
|
||||
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|
||||
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|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
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|
||||
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|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
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|
||||
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|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
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|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
01:4aaf _print_sl_out34
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
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|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0151 _wait_ly_4
|
||||
00:0157 _wait_ly_5
|
||||
00:0177 test_finish
|
||||
00:01cf hiram_test
|
||||
00:01d2 _wait_ly_6
|
||||
00:01d8 _wait_ly_7
|
||||
00:01ec finish_round1
|
||||
00:01ed _wait_ly_8
|
||||
00:01f3 _wait_ly_9
|
||||
00:0208 finish_round2
|
||||
00:0209 _wait_ly_10
|
||||
00:020f _wait_ly_11
|
||||
00:0225 finish_round3
|
||||
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|
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|
|
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|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/di_timing-GS.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
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|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0158 _wait_ly_4
|
||||
00:015e _wait_ly_5
|
||||
00:016d test_round1
|
||||
00:0177 _delay_long_time_0
|
||||
00:0186 finish_round1
|
||||
00:0189 _wait_ly_6
|
||||
00:018f _wait_ly_7
|
||||
00:019e test_round2
|
||||
00:01a8 _delay_long_time_1
|
||||
00:01b4 test_finish
|
||||
00:01c8 _wait_ly_8
|
||||
00:01ce _wait_ly_9
|
||||
00:01e4 _print_results_halt_1
|
||||
00:01e7 _test_ok_cb_0
|
||||
00:01ef _print_sl_data55
|
||||
00:01f7 _print_sl_out55
|
||||
00:01fa fail_halt
|
||||
00:020e _wait_ly_10
|
||||
00:0214 _wait_ly_11
|
||||
00:022a _print_results_halt_2
|
||||
00:022d _test_failure_cb_0
|
||||
00:0235 _print_sl_data56
|
||||
00:0240 _print_sl_out56
|
||||
00:0243 fail_round1
|
||||
00:0257 _wait_ly_12
|
||||
00:025d _wait_ly_13
|
||||
00:0273 _print_results_halt_3
|
||||
00:0276 _test_failure_cb_1
|
||||
00:027e _print_sl_data57
|
||||
00:028c _print_sl_out57
|
||||
00:028f fail_round2
|
||||
00:02a3 _wait_ly_14
|
||||
00:02a9 _wait_ly_15
|
||||
00:02bf _print_results_halt_4
|
||||
00:02c2 _test_failure_cb_2
|
||||
00:02ca _print_sl_data58
|
||||
00:02d8 _print_sl_out58
|
||||
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|
@ -0,0 +1,192 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/div_timing.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0232 test_finish
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.2 KiB |
Binary file not shown.
|
|
@ -0,0 +1,192 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/ei_timing.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0160 test_finish
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 518 B |
|
|
@ -0,0 +1 @@
|
|||
fail: true
|
||||
Binary file not shown.
|
|
@ -0,0 +1,219 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/hblank_ly_scx_timing-GS.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
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|
||||
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|
||||
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|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
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|
||||
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|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
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|
||||
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|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0151 _wait_ly_4
|
||||
00:0157 _wait_ly_5
|
||||
00:03a2 _wait_ly_6
|
||||
00:03a8 _wait_ly_7
|
||||
00:03be _print_results_halt_1
|
||||
00:03c1 _test_ok_cb_0
|
||||
00:03c9 _print_sl_data55
|
||||
00:03d1 _print_sl_out55
|
||||
00:03d4 test_fail
|
||||
00:0404 _wait_ly_8
|
||||
00:040a _wait_ly_9
|
||||
00:0420 _print_results_halt_2
|
||||
00:0423 _test_failure_dump_cb_0
|
||||
00:042e _print_sl_data56
|
||||
00:0438 _print_sl_out56
|
||||
00:044c _print_sl_data57
|
||||
00:0458 _print_sl_out57
|
||||
00:045b standard_delay
|
||||
00:0473 setup_and_wait
|
||||
00:0473 _wait_ly_10
|
||||
00:0479 _wait_ly_11
|
||||
00:048d fail_halt
|
||||
00:04a1 _wait_ly_12
|
||||
00:04a7 _wait_ly_13
|
||||
00:04bd _print_results_halt_3
|
||||
00:04c0 _test_failure_cb_0
|
||||
00:04c8 _print_sl_data58
|
||||
00:04d3 _print_sl_out58
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.2 KiB |
Binary file not shown.
|
|
@ -0,0 +1,203 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_1_2_timing-GS.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0151 _wait_ly_4
|
||||
00:0157 _wait_ly_5
|
||||
00:01ab setup_and_wait_mode1
|
||||
00:01ab _wait_ly_6
|
||||
00:01be setup_and_wait_mode2
|
||||
00:01cb fail_halt
|
||||
00:01df _wait_ly_7
|
||||
00:01e5 _wait_ly_8
|
||||
00:01fb _print_results_halt_1
|
||||
00:01fe _test_failure_cb_0
|
||||
00:0206 _print_sl_data55
|
||||
00:0211 _print_sl_out55
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.2 KiB |
Binary file not shown.
|
|
@ -0,0 +1,203 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_2_0_timing.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0151 _wait_ly_4
|
||||
00:0157 _wait_ly_5
|
||||
00:01a9 setup_and_wait_mode2
|
||||
00:01a9 _wait_ly_6
|
||||
00:01cc setup_and_wait_mode0
|
||||
00:01d9 fail_halt
|
||||
00:01ed _wait_ly_7
|
||||
00:01f3 _wait_ly_8
|
||||
00:0209 _print_results_halt_1
|
||||
00:020c _test_failure_cb_0
|
||||
00:0214 _print_sl_data55
|
||||
00:021f _print_sl_out55
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 1.2 KiB |
Binary file not shown.
|
|
@ -0,0 +1,202 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_2_mode0_timing.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
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|
||||
00:0a28 _testcase_end_94
|
||||
00:0a39 _testcase_data_95
|
||||
00:0a44 _testcase_end_95
|
||||
00:0a55 _testcase_data_96
|
||||
00:0a60 _testcase_end_96
|
||||
00:0a71 _testcase_data_97
|
||||
00:0a7c _testcase_end_97
|
||||
00:0a8d _testcase_data_98
|
||||
00:0a98 _testcase_end_98
|
||||
00:0aa9 _testcase_data_99
|
||||
00:0ab4 _testcase_end_99
|
||||
00:0ac5 _testcase_data_100
|
||||
00:0ad0 _testcase_end_100
|
||||
00:0ae1 _testcase_data_101
|
||||
00:0aec _testcase_end_101
|
||||
00:0afd _testcase_data_102
|
||||
00:0b08 _testcase_end_102
|
||||
00:0b19 _testcase_data_103
|
||||
00:0b24 _testcase_end_103
|
||||
00:0b35 _testcase_data_104
|
||||
00:0b40 _testcase_end_104
|
||||
00:0b54 _wait_ly_4
|
||||
00:0b5a _wait_ly_5
|
||||
00:0b70 _print_results_halt_1
|
||||
00:0b73 _test_ok_cb_0
|
||||
00:0b7b _print_sl_data55
|
||||
00:0b83 _print_sl_out55
|
||||
00:0b86 run_testcase
|
||||
00:0b88 _wait_ly_6
|
||||
00:0b8e _wait_ly_7
|
||||
00:0bb9 testcase_round_a
|
||||
00:0bc4 testcase_round_a_ret
|
||||
00:0bd4 testcase_round_b
|
||||
00:0bdf testcase_round_b_ret
|
||||
00:0bf0 prepare_sprites
|
||||
00:0c06 prepare_nop_area
|
||||
00:0c0f setup_and_wait_mode2
|
||||
00:0c0f _wait_ly_8
|
||||
00:0c32 test_fail
|
||||
00:0c46 _wait_ly_9
|
||||
00:0c4c _wait_ly_10
|
||||
00:0c62 _print_results_halt_2
|
||||
00:0c65 _test_fail_cb
|
||||
00:0c6d _print_sl_data56
|
||||
00:0c74 _print_sl_out56
|
||||
00:0c82 _print_sl_data57
|
||||
00:0c8a _print_sl_out57
|
||||
00:0c8d fail_halt
|
||||
00:0ca1 _wait_ly_11
|
||||
00:0ca7 _wait_ly_12
|
||||
00:0cbd _print_results_halt_3
|
||||
00:0cc0 _test_failure_cb_0
|
||||
00:0cc8 _print_sl_data58
|
||||
00:0cd3 _print_sl_out58
|
||||
00:c000 testcase_id
|
||||
00:c002 nop_area_a
|
||||
00:c062 nop_area_b
|
||||
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|
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|
|
@ -0,0 +1,202 @@
|
|||
; this file was created with wlalink by ville helin <vhelin@iki.fi>.
|
||||
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_2_mode3_timing.gb".
|
||||
|
||||
[labels]
|
||||
01:4bff print_load_font
|
||||
01:4c0c print_string
|
||||
01:4c16 print_a
|
||||
01:4c20 print_newline
|
||||
01:4c2b print_digit
|
||||
01:4c38 print_regs
|
||||
01:4c41 _print_sl_data0
|
||||
01:4c47 _print_sl_out0
|
||||
01:4c54 _print_sl_data1
|
||||
01:4c5a _print_sl_out1
|
||||
01:4c6c _print_sl_data2
|
||||
01:4c72 _print_sl_out2
|
||||
01:4c7f _print_sl_data3
|
||||
01:4c85 _print_sl_out3
|
||||
01:4c97 _print_sl_data4
|
||||
01:4c9d _print_sl_out4
|
||||
01:4caa _print_sl_data5
|
||||
01:4cb0 _print_sl_out5
|
||||
01:4cc2 _print_sl_data6
|
||||
01:4cc8 _print_sl_out6
|
||||
01:4cd5 _print_sl_data7
|
||||
01:4cdb _print_sl_out7
|
||||
01:4000 font
|
||||
00:c000 regs_save
|
||||
00:c000 regs_save.f
|
||||
00:c001 regs_save.a
|
||||
00:c002 regs_save.c
|
||||
00:c003 regs_save.b
|
||||
00:c004 regs_save.e
|
||||
00:c005 regs_save.d
|
||||
00:c006 regs_save.l
|
||||
00:c007 regs_save.h
|
||||
00:c008 regs_flags
|
||||
00:c009 regs_assert
|
||||
00:c009 regs_assert.f
|
||||
00:c00a regs_assert.a
|
||||
00:c00b regs_assert.c
|
||||
00:c00c regs_assert.b
|
||||
00:c00d regs_assert.e
|
||||
00:c00e regs_assert.d
|
||||
00:c00f regs_assert.l
|
||||
00:c010 regs_assert.h
|
||||
00:c011 memdump_len
|
||||
00:c012 memdump_addr
|
||||
01:47f0 memcpy
|
||||
01:47f9 memset
|
||||
01:4802 memcmp
|
||||
01:4810 clear_vram
|
||||
01:481a clear_oam
|
||||
01:4824 disable_lcd_safe
|
||||
01:482a _wait_ly_0
|
||||
01:4830 _wait_ly_1
|
||||
01:4839 reset_screen
|
||||
01:484d process_results
|
||||
01:4861 _wait_ly_2
|
||||
01:4867 _wait_ly_3
|
||||
01:487d _print_results_halt_0
|
||||
01:4880 _process_results_cb
|
||||
01:488b _print_sl_data8
|
||||
01:4895 _print_sl_out8
|
||||
01:48af _print_sl_data9
|
||||
01:48ba _print_sl_out9
|
||||
01:48d2 _print_sl_data10
|
||||
01:48de _print_sl_out10
|
||||
01:48df dump_mem
|
||||
01:48fe _dump_mem_line
|
||||
01:4928 _check_asserts
|
||||
01:4936 _print_sl_data11
|
||||
01:4939 _print_sl_out11
|
||||
01:4945 _print_sl_data12
|
||||
01:4947 _print_sl_out12
|
||||
01:494f _print_sl_data13
|
||||
01:4952 _print_sl_out13
|
||||
01:495c __check_assert_fail0
|
||||
01:4967 _print_sl_data14
|
||||
01:496a _print_sl_out14
|
||||
01:496d __check_assert_ok0
|
||||
01:4975 _print_sl_data15
|
||||
01:497a _print_sl_out15
|
||||
01:497c __check_assert_skip0
|
||||
01:4984 _print_sl_data16
|
||||
01:498c _print_sl_out16
|
||||
01:498c __check_assert_out0
|
||||
01:4998 _print_sl_data17
|
||||
01:499a _print_sl_out17
|
||||
01:49a2 _print_sl_data18
|
||||
01:49a5 _print_sl_out18
|
||||
01:49af __check_assert_fail1
|
||||
01:49ba _print_sl_data19
|
||||
01:49bd _print_sl_out19
|
||||
01:49c0 __check_assert_ok1
|
||||
01:49c8 _print_sl_data20
|
||||
01:49cd _print_sl_out20
|
||||
01:49cf __check_assert_skip1
|
||||
01:49d7 _print_sl_data21
|
||||
01:49df _print_sl_out21
|
||||
01:49df __check_assert_out1
|
||||
01:49ea _print_sl_data22
|
||||
01:49ed _print_sl_out22
|
||||
01:49f9 _print_sl_data23
|
||||
01:49fb _print_sl_out23
|
||||
01:4a03 _print_sl_data24
|
||||
01:4a06 _print_sl_out24
|
||||
01:4a10 __check_assert_fail2
|
||||
01:4a1b _print_sl_data25
|
||||
01:4a1e _print_sl_out25
|
||||
01:4a21 __check_assert_ok2
|
||||
01:4a29 _print_sl_data26
|
||||
01:4a2e _print_sl_out26
|
||||
01:4a30 __check_assert_skip2
|
||||
01:4a38 _print_sl_data27
|
||||
01:4a40 _print_sl_out27
|
||||
01:4a40 __check_assert_out2
|
||||
01:4a4c _print_sl_data28
|
||||
01:4a4e _print_sl_out28
|
||||
01:4a56 _print_sl_data29
|
||||
01:4a59 _print_sl_out29
|
||||
01:4a63 __check_assert_fail3
|
||||
01:4a6e _print_sl_data30
|
||||
01:4a71 _print_sl_out30
|
||||
01:4a74 __check_assert_ok3
|
||||
01:4a7c _print_sl_data31
|
||||
01:4a81 _print_sl_out31
|
||||
01:4a83 __check_assert_skip3
|
||||
01:4a8b _print_sl_data32
|
||||
01:4a93 _print_sl_out32
|
||||
01:4a93 __check_assert_out3
|
||||
01:4a9e _print_sl_data33
|
||||
01:4aa1 _print_sl_out33
|
||||
01:4aad _print_sl_data34
|
||||
01:4aaf _print_sl_out34
|
||||
01:4ab7 _print_sl_data35
|
||||
01:4aba _print_sl_out35
|
||||
01:4ac4 __check_assert_fail4
|
||||
01:4acf _print_sl_data36
|
||||
01:4ad2 _print_sl_out36
|
||||
01:4ad5 __check_assert_ok4
|
||||
01:4add _print_sl_data37
|
||||
01:4ae2 _print_sl_out37
|
||||
01:4ae4 __check_assert_skip4
|
||||
01:4aec _print_sl_data38
|
||||
01:4af4 _print_sl_out38
|
||||
01:4af4 __check_assert_out4
|
||||
01:4b00 _print_sl_data39
|
||||
01:4b02 _print_sl_out39
|
||||
01:4b0a _print_sl_data40
|
||||
01:4b0d _print_sl_out40
|
||||
01:4b17 __check_assert_fail5
|
||||
01:4b22 _print_sl_data41
|
||||
01:4b25 _print_sl_out41
|
||||
01:4b28 __check_assert_ok5
|
||||
01:4b30 _print_sl_data42
|
||||
01:4b35 _print_sl_out42
|
||||
01:4b37 __check_assert_skip5
|
||||
01:4b3f _print_sl_data43
|
||||
01:4b47 _print_sl_out43
|
||||
01:4b47 __check_assert_out5
|
||||
01:4b52 _print_sl_data44
|
||||
01:4b55 _print_sl_out44
|
||||
01:4b61 _print_sl_data45
|
||||
01:4b63 _print_sl_out45
|
||||
01:4b6b _print_sl_data46
|
||||
01:4b6e _print_sl_out46
|
||||
01:4b78 __check_assert_fail6
|
||||
01:4b83 _print_sl_data47
|
||||
01:4b86 _print_sl_out47
|
||||
01:4b89 __check_assert_ok6
|
||||
01:4b91 _print_sl_data48
|
||||
01:4b96 _print_sl_out48
|
||||
01:4b98 __check_assert_skip6
|
||||
01:4ba0 _print_sl_data49
|
||||
01:4ba8 _print_sl_out49
|
||||
01:4ba8 __check_assert_out6
|
||||
01:4bb4 _print_sl_data50
|
||||
01:4bb6 _print_sl_out50
|
||||
01:4bbe _print_sl_data51
|
||||
01:4bc1 _print_sl_out51
|
||||
01:4bcb __check_assert_fail7
|
||||
01:4bd6 _print_sl_data52
|
||||
01:4bd9 _print_sl_out52
|
||||
01:4bdc __check_assert_ok7
|
||||
01:4be4 _print_sl_data53
|
||||
01:4be9 _print_sl_out53
|
||||
01:4beb __check_assert_skip7
|
||||
01:4bf3 _print_sl_data54
|
||||
01:4bfb _print_sl_out54
|
||||
01:4bfb __check_assert_out7
|
||||
00:0151 _wait_ly_4
|
||||
00:0157 _wait_ly_5
|
||||
00:01b5 setup_and_wait_mode2
|
||||
00:01b5 _wait_ly_6
|
||||
00:01d8 fail_halt
|
||||
00:01ec _wait_ly_7
|
||||
00:01f2 _wait_ly_8
|
||||
00:0208 _print_results_halt_1
|
||||
00:020b _test_failure_cb_0
|
||||
00:0213 _print_sl_data55
|
||||
00:021e _print_sl_out55
|
||||
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|
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Reference in New Issue