From 6f04c89c5fdb86d99a4ffdd90b2d8eda5b7c9fc9 Mon Sep 17 00:00:00 2001
From: Vicki Pfau <vi@endrift.com>
Date: Sat, 8 Apr 2017 11:10:11 -0700
Subject: [PATCH] DS: Fix non-debugger builds

---
 src/ds/ds.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/ds/ds.c b/src/ds/ds.c
index 93bae3e6b..1c5f856b2 100644
--- a/src/ds/ds.c
+++ b/src/ds/ds.c
@@ -607,6 +607,7 @@ void DSGetGameTitle(struct DS* ds, char* out) {
 
 void DSHitStub(struct ARMCore* cpu, uint32_t opcode) {
 	struct DS* ds = (struct DS*) cpu->master;
+#ifdef USE_DEBUGGERS
 	if (ds->debugger) {
 		struct mDebuggerEntryInfo info = {
 			.address = _ARMPCAddress(cpu),
@@ -614,6 +615,7 @@ void DSHitStub(struct ARMCore* cpu, uint32_t opcode) {
 		};
 		mDebuggerEnter(ds->debugger->d.p, DEBUGGER_ENTER_ILLEGAL_OP, &info);
 	}
+#endif
 	// TODO: More sensible category?
 	mLOG(DS, ERROR, "Stub opcode: %08x", opcode);
 }
@@ -629,12 +631,14 @@ void DSIllegal(struct ARMCore* cpu, uint32_t opcode) {
 			cpu->gprs[ARM_PC] -= WORD_SIZE_ARM * 2;
 			ARM_WRITE_PC;
 		}
+#ifdef USE_DEBUGGERS
 	} else if (ds->debugger) {
 		struct mDebuggerEntryInfo info = {
 			.address = _ARMPCAddress(cpu),
 			.opcode = opcode
 		};
 		mDebuggerEnter(ds->debugger->d.p, DEBUGGER_ENTER_ILLEGAL_OP, &info);
+#endif
 	} else {
 		ARMRaiseUndefined(cpu);
 	}
@@ -646,6 +650,7 @@ void DSBreakpoint(struct ARMCore* cpu, int immediate) {
 		return;
 	}
 	switch (immediate) {
+#ifdef USE_DEBUGGERS
 	case CPU_COMPONENT_DEBUGGER:
 		if (ds->debugger) {
 			struct mDebuggerEntryInfo info = {
@@ -654,6 +659,7 @@ void DSBreakpoint(struct ARMCore* cpu, int immediate) {
 			mDebuggerEnter(ds->debugger->d.p, DEBUGGER_ENTER_BREAKPOINT, &info);
 		}
 		break;
+#endif
 	default:
 		break;
 	}