From 6604afb670535c2a37b3a93ae48ab715b0ec16a7 Mon Sep 17 00:00:00 2001 From: Jeffrey Pfau Date: Sun, 22 Nov 2015 02:30:59 -0800 Subject: [PATCH] ARM7: Fix bank switching with LDR[B]T/STR[B]T --- CHANGES | 1 + src/arm/isa-arm.c | 12 ++++++++---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/CHANGES b/CHANGES index 120d49051..d84b5cfcd 100644 --- a/CHANGES +++ b/CHANGES @@ -36,6 +36,7 @@ Bugfixes: - GBA Memory: Fix DMAs triggering two cycles early - ARM7: Fix STRT/STRBT - ARM7: Implement undefined STRH/LDRH/LDRSH/LDRSB versions + - ARM7: Fix bank switching with LDR[B]T/STR[B]T Misc: - Qt: Window size command line options are now supported - Qt: Increase usability of key mapper diff --git a/src/arm/isa-arm.c b/src/arm/isa-arm.c index 97cb7168d..518ab5134 100644 --- a/src/arm/isa-arm.c +++ b/src/arm/isa-arm.c @@ -524,28 +524,32 @@ DEFINE_LOAD_STORE_MODE_3_INSTRUCTION_ARM(STRH, cpu->memory.store16(cpu, address, DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(LDRBT, enum PrivilegeMode priv = cpu->privilegeMode; ARMSetPrivilegeMode(cpu, MODE_USER); - cpu->gprs[rd] = cpu->memory.load8(cpu, address, ¤tCycles); + int32_t r = cpu->memory.load8(cpu, address, ¤tCycles); ARMSetPrivilegeMode(cpu, priv); + cpu->gprs[rd] = r; ARM_LOAD_POST_BODY;) DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(LDRT, enum PrivilegeMode priv = cpu->privilegeMode; ARMSetPrivilegeMode(cpu, MODE_USER); - cpu->gprs[rd] = cpu->memory.load32(cpu, address, ¤tCycles); + int32_t r = cpu->memory.load32(cpu, address, ¤tCycles); ARMSetPrivilegeMode(cpu, priv); + cpu->gprs[rd] = r; ARM_LOAD_POST_BODY;) DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(STRBT, enum PrivilegeMode priv = cpu->privilegeMode; + int32_t r = cpu->gprs[rd]; ARMSetPrivilegeMode(cpu, MODE_USER); - cpu->memory.store8(cpu, address, cpu->gprs[rd], ¤tCycles); + cpu->memory.store8(cpu, address, r, ¤tCycles); ARMSetPrivilegeMode(cpu, priv); ARM_STORE_POST_BODY;) DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(STRT, enum PrivilegeMode priv = cpu->privilegeMode; + int32_t r = cpu->gprs[rd]; ARMSetPrivilegeMode(cpu, MODE_USER); - cpu->memory.store32(cpu, address, cpu->gprs[rd], ¤tCycles); + cpu->memory.store32(cpu, address, r, ¤tCycles); ARMSetPrivilegeMode(cpu, priv); ARM_STORE_POST_BODY;)