From 5f1f6088bd72ed2cebc4d5747c0937f31f606938 Mon Sep 17 00:00:00 2001 From: Jeffrey Pfau Date: Thu, 18 Apr 2013 01:35:48 -0700 Subject: [PATCH] Implement MUL --- src/arm/isa-arm.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/src/arm/isa-arm.c b/src/arm/isa-arm.c index 7bb276e4f..79e238f8c 100644 --- a/src/arm/isa-arm.c +++ b/src/arm/isa-arm.c @@ -303,6 +303,23 @@ void ARMStep(struct ARMCore* cpu) { DEFINE_ALU_INSTRUCTION_EX_ARM(NAME ## _RORR, S_BODY, _shiftRORR, BODY, POST_BODY) \ DEFINE_ALU_INSTRUCTION_EX_ARM(NAME ## I, S_BODY, _immediate, BODY, POST_BODY) +#define DEFINE_MULTIPLY_INSTRUCTION_EX_ARM(NAME, BODY, S_BODY) \ + DEFINE_INSTRUCTION_ARM(NAME, \ + int rd = (opcode >> 12) & 0xF; \ + int rdHi = (opcode >> 16) & 0xF; \ + int rs = (opcode >> 8) & 0xF; \ + int rm = opcode & 0xF; \ + UNUSED(rdHi); \ + BODY; \ + S_BODY; \ + if (rd == ARM_PC) { \ + ARM_WRITE_PC; \ + }) + +#define DEFINE_MULTIPLY_INSTRUCTION_ARM(NAME, BODY, S_BODY) \ + DEFINE_MULTIPLY_INSTRUCTION_EX_ARM(NAME, BODY, ) \ + DEFINE_MULTIPLY_INSTRUCTION_EX_ARM(NAME ## S, BODY, S_BODY) + #define DEFINE_LOAD_STORE_INSTRUCTION_EX_ARM(NAME, ADDRESS, WRITEBACK, BODY) \ DEFINE_INSTRUCTION_ARM(NAME, \ uint32_t address; \ @@ -482,8 +499,7 @@ DEFINE_ALU_INSTRUCTION_S_ONLY_ARM(TST, ARM_NEUTRAL_S(cpu->gprs[rn], cpu->shifter DEFINE_INSTRUCTION_ARM(MLA, ARM_STUB) DEFINE_INSTRUCTION_ARM(MLAS, ARM_STUB) -DEFINE_INSTRUCTION_ARM(MUL, ARM_STUB) -DEFINE_INSTRUCTION_ARM(MULS, ARM_STUB) +DEFINE_MULTIPLY_INSTRUCTION_ARM(MUL, cpu->gprs[rd] = cpu->gprs[rm] * cpu->gprs[rs], ARM_NEUTRAL_S(cpu->gprs[rm], cpu->gprs[rs], cpu->gprs[rd])) DEFINE_INSTRUCTION_ARM(SMLAL, ARM_STUB) DEFINE_INSTRUCTION_ARM(SMLALS, ARM_STUB) DEFINE_INSTRUCTION_ARM(SMULL, ARM_STUB)