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ARM9: Fix blx lr

This commit is contained in:
Vicki Pfau 2017-03-17 13:06:11 -07:00
parent 92e4c859a7
commit 5dca783569
2 changed files with 7 additions and 5 deletions
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5
src/arm/isa-arm.c
View File

@ -706,9 +706,10 @@ DEFINE_INSTRUCTION_ARM(BLX,
DEFINE_INSTRUCTION_ARM(BLX2,
int rm = opcode & 0x0000000F;
int address = cpu->gprs[rm];
cpu->gprs[ARM_LR] = cpu->gprs[ARM_PC] - WORD_SIZE_ARM;
_ARMSetMode(cpu, cpu->gprs[rm] & 0x00000001);
cpu->gprs[ARM_PC] = cpu->gprs[rm] & 0xFFFFFFFE;
_ARMSetMode(cpu, address & 0x00000001);
cpu->gprs[ARM_PC] = address & 0xFFFFFFFE;
if (cpu->executionMode == MODE_THUMB) {
THUMB_WRITE_PC;
} else {

7
src/arm/isa-thumb.c
View File

@ -422,13 +422,14 @@ DEFINE_INSTRUCTION_THUMB(BX,
DEFINE_INSTRUCTION_THUMB(BLX2,
int rm = (opcode >> 3) & 0xF;
_ARMSetMode(cpu, cpu->gprs[rm] & 0x00000001);
int address = cpu->gprs[rm];
_ARMSetMode(cpu, address & 0x00000001);
int misalign = 0;
if (rm == ARM_PC) {
misalign = cpu->gprs[rm] & 0x00000002;
misalign = address & 0x00000002;
}
cpu->gprs[ARM_LR] = cpu->gprs[ARM_PC] - 1;
cpu->gprs[ARM_PC] = (cpu->gprs[rm] & 0xFFFFFFFE) - misalign;
cpu->gprs[ARM_PC] = (address & 0xFFFFFFFE) - misalign;
if (cpu->executionMode == MODE_THUMB) {
THUMB_WRITE_PC;
} else {