diff --git a/src/lr35902/isa-lr35902.c b/src/lr35902/isa-lr35902.c
index 8e33a6734..5e66b10a9 100644
--- a/src/lr35902/isa-lr35902.c
+++ b/src/lr35902/isa-lr35902.c
@@ -644,7 +644,7 @@ DEFINE_POPPUSH_INSTRUCTION_LR35902(DE, D, d, e);
 DEFINE_POPPUSH_INSTRUCTION_LR35902(HL, H, h, l);
 DEFINE_POPPUSH_INSTRUCTION_LR35902(AF, A, a, f.packed);
 
-#define DEFINE_CB_2_INSTRUCTION_LR35902(NAME, BODY) \
+#define DEFINE_CB_2_INSTRUCTION_LR35902(NAME, WB, BODY) \
 	DEFINE_INSTRUCTION_LR35902(NAME ## B, uint8_t reg = cpu->b; BODY; cpu->b = reg) \
 	DEFINE_INSTRUCTION_LR35902(NAME ## C, uint8_t reg = cpu->c; BODY; cpu->c = reg) \
 	DEFINE_INSTRUCTION_LR35902(NAME ## D, uint8_t reg = cpu->d; BODY; cpu->d = reg) \
@@ -655,7 +655,7 @@ DEFINE_POPPUSH_INSTRUCTION_LR35902(AF, A, a, f.packed);
 		uint8_t reg = cpu->bus; \
 		BODY; \
 		cpu->bus = reg; \
-		cpu->executionState = LR35902_CORE_MEMORY_STORE; \
+		cpu->executionState = WB; \
 		cpu->instruction = _LR35902InstructionNOP;) \
 	DEFINE_INSTRUCTION_LR35902(NAME ## HL, \
 		cpu->index = LR35902ReadHL(cpu); \
@@ -663,22 +663,22 @@ DEFINE_POPPUSH_INSTRUCTION_LR35902(AF, A, a, f.packed);
 		cpu->instruction = _LR35902Instruction ## NAME ## HLDelay;) \
 	DEFINE_INSTRUCTION_LR35902(NAME ## A, uint8_t reg = cpu->a; BODY; cpu->a = reg)
 
-#define DEFINE_CB_INSTRUCTION_LR35902(NAME, BODY) \
-	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 0, uint8_t bit = 1; BODY) \
-	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 1, uint8_t bit = 2; BODY) \
-	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 2, uint8_t bit = 4; BODY) \
-	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 3, uint8_t bit = 8; BODY) \
-	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 4, uint8_t bit = 16; BODY) \
-	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 5, uint8_t bit = 32; BODY) \
-	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 6, uint8_t bit = 64; BODY) \
-	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 7, uint8_t bit = 128; BODY)
+#define DEFINE_CB_INSTRUCTION_LR35902(NAME, WB, BODY) \
+	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 0, WB, uint8_t bit = 1; BODY) \
+	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 1, WB, uint8_t bit = 2; BODY) \
+	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 2, WB, uint8_t bit = 4; BODY) \
+	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 3, WB, uint8_t bit = 8; BODY) \
+	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 4, WB, uint8_t bit = 16; BODY) \
+	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 5, WB, uint8_t bit = 32; BODY) \
+	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 6, WB, uint8_t bit = 64; BODY) \
+	DEFINE_CB_2_INSTRUCTION_LR35902(NAME ## 7, WB, uint8_t bit = 128; BODY)
 
-DEFINE_CB_INSTRUCTION_LR35902(BIT, cpu->f.n = 0; cpu->f.h = 1; cpu->f.z = !(reg & bit))
-DEFINE_CB_INSTRUCTION_LR35902(RES, reg &= ~bit)
-DEFINE_CB_INSTRUCTION_LR35902(SET, reg |= bit)
+DEFINE_CB_INSTRUCTION_LR35902(BIT, LR35902_CORE_STALL, cpu->f.n = 0; cpu->f.h = 1; cpu->f.z = !(reg & bit))
+DEFINE_CB_INSTRUCTION_LR35902(RES, LR35902_CORE_MEMORY_STORE, reg &= ~bit)
+DEFINE_CB_INSTRUCTION_LR35902(SET, LR35902_CORE_MEMORY_STORE, reg |= bit)
 
 #define DEFINE_CB_ALU_INSTRUCTION_LR35902(NAME, BODY) \
-	DEFINE_CB_2_INSTRUCTION_LR35902(NAME, \
+	DEFINE_CB_2_INSTRUCTION_LR35902(NAME, LR35902_CORE_MEMORY_STORE, \
 		BODY; \
 		cpu->f.n = 0; \
 		cpu->f.h = 0; \