Wii: Fix ppc32 endianness regression

This commit is contained in:
Vicki Pfau 2020-08-17 15:52:20 -07:00
parent 711a60e110
commit 5b7d0b1055
1 changed files with 8 additions and 8 deletions

View File

@ -134,32 +134,32 @@ typedef intptr_t ssize_t;
#define LOAD_32BE(DEST, ADDR, ARR) DEST = *(uint32_t*) ((uintptr_t) (ARR) + (size_t) (ADDR)) #define LOAD_32BE(DEST, ADDR, ARR) DEST = *(uint32_t*) ((uintptr_t) (ARR) + (size_t) (ADDR))
#if defined(__PPC__) || defined(__POWERPC__) #if defined(__PPC__) || defined(__POWERPC__)
#define LOAD_32LE(DEST, ADDR, ARR) { \ #define LOAD_32LE(DEST, ADDR, ARR) { \
off_t _addr = (ADDR); \ size_t _addr = (ADDR); \
const void* _ptr = (ARR); \ const void* _ptr = (ARR); \
__asm__("lwbrx %0, %1, %2" : "=r"(DEST) : "b"(_ptr), "r"(_addr)); \ __asm__("lwbrx %0, %1, %2" : "=r"(DEST) : "b"(_ptr), "r"(_addr)); \
} }
#define LOAD_16LE(DEST, ADDR, ARR) { \ #define LOAD_16LE(DEST, ADDR, ARR) { \
off_t _addr = (ADDR); \ size_t _addr = (ADDR); \
const void* _ptr = (ARR); \ const void* _ptr = (ARR); \
__asm__("lhbrx %0, %1, %2" : "=r"(DEST) : "b"(_ptr), "r"(_addr)); \ __asm__("lhbrx %0, %1, %2" : "=r"(DEST) : "b"(_ptr), "r"(_addr)); \
} }
#define STORE_32LE(SRC, ADDR, ARR) { \ #define STORE_32LE(SRC, ADDR, ARR) { \
off_t _addr = (ADDR); \ size_t _addr = (ADDR); \
void* _ptr = (ARR); \ void* _ptr = (ARR); \
__asm__("stwbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr) : "memory"); \ __asm__("stwbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr) : "memory"); \
} }
#define STORE_16LE(SRC, ADDR, ARR) { \ #define STORE_16LE(SRC, ADDR, ARR) { \
off_t _addr = (ADDR); \ size_t _addr = (ADDR); \
void* _ptr = (ARR); \ void* _ptr = (ARR); \
__asm__("sthbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr) : "memory"); \ __asm__("sthbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr) : "memory"); \
} }
#ifndef _ARCH_PWR7 #ifndef _ARCH_PWR7
#define LOAD_64LE(DEST, ADDR, ARR) { \ #define LOAD_64LE(DEST, ADDR, ARR) { \
off_t _addr = (ADDR); \ size_t _addr = (ADDR); \
union { \ union { \
struct { \ struct { \
uint32_t hi; \ uint32_t hi; \
@ -176,7 +176,7 @@ typedef intptr_t ssize_t;
} }
#define STORE_64LE(SRC, ADDR, ARR) { \ #define STORE_64LE(SRC, ADDR, ARR) { \
off_t _addr = (ADDR); \ size_t _addr = (ADDR); \
union { \ union { \
struct { \ struct { \
uint32_t hi; \ uint32_t hi; \
@ -192,13 +192,13 @@ typedef intptr_t ssize_t;
} }
#else #else
#define LOAD_64LE(DEST, ADDR, ARR) { \ #define LOAD_64LE(DEST, ADDR, ARR) { \
off_t _addr = (ADDR); \ size_t _addr = (ADDR); \
const void* _ptr = (ARR); \ const void* _ptr = (ARR); \
__asm__("ldbrx %0, %1, %2" : "=r"(DEST) : "b"(_ptr), "r"(_addr)); \ __asm__("ldbrx %0, %1, %2" : "=r"(DEST) : "b"(_ptr), "r"(_addr)); \
} }
#define STORE_64LE(SRC, ADDR, ARR) { \ #define STORE_64LE(SRC, ADDR, ARR) { \
off_t _addr = (ADDR); \ size_t _addr = (ADDR); \
void* _ptr = (ARR); \ void* _ptr = (ARR); \
__asm__("stdbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr) : "memory"); \ __asm__("stdbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr) : "memory"); \
} }