mirror of https://github.com/mgba-emu/mgba.git
GB: Add preliminary HuC-3 support
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c213ee9bb6
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@ -35,6 +35,7 @@ static void _GBMBC6(struct GBMemory*, uint16_t address, uint8_t value);
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static void _GBMBC7(struct GBMemory*, uint16_t address, uint8_t value);
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static void _GBMBC7(struct GBMemory*, uint16_t address, uint8_t value);
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static uint8_t _GBMBC7Read(struct GBMemory*, uint16_t address);
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static uint8_t _GBMBC7Read(struct GBMemory*, uint16_t address);
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static void _GBMBC7Write(struct GBMemory*, uint16_t address, uint8_t value);
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static void _GBMBC7Write(struct GBMemory*, uint16_t address, uint8_t value);
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static void _GBHuC3(struct GBMemory*, uint16_t address, uint8_t value);
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static uint8_t GBFastLoad8(struct LR35902Core* cpu, uint16_t address) {
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static uint8_t GBFastLoad8(struct LR35902Core* cpu, uint16_t address) {
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if (UNLIKELY(address > cpu->memory.activeRegionEnd)) {
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if (UNLIKELY(address > cpu->memory.activeRegionEnd)) {
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@ -188,6 +189,10 @@ void GBMemoryReset(struct GB* gb) {
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gb->memory.mbc = _GBMBC7;
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gb->memory.mbc = _GBMBC7;
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gb->memory.mbcType = GB_MBC7;
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gb->memory.mbcType = GB_MBC7;
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break;
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break;
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case 0xFE:
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gb->memory.mbc = _GBHuC3;
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gb->memory.mbcType = GB_HuC3;
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break;
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}
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}
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if (!gb->memory.wram) {
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if (!gb->memory.wram) {
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@ -229,6 +234,8 @@ uint8_t GBLoad8(struct LR35902Core* cpu, uint16_t address) {
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return gb->memory.sramBank[address & (GB_SIZE_EXTERNAL_RAM - 1)];
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return gb->memory.sramBank[address & (GB_SIZE_EXTERNAL_RAM - 1)];
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} else if (memory->mbcType == GB_MBC7) {
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} else if (memory->mbcType == GB_MBC7) {
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return _GBMBC7Read(memory, address);
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return _GBMBC7Read(memory, address);
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} else if (memory->mbcType == GB_HuC3) {
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return 0x01; // TODO: Is this supposed to be the current SRAM bank?
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}
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}
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return 0xFF;
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return 0xFF;
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case GB_REGION_WORKING_RAM_BANK0:
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case GB_REGION_WORKING_RAM_BANK0:
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@ -933,6 +940,38 @@ void _GBMBC7Write(struct GBMemory* memory, uint16_t address, uint8_t value) {
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}
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}
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}
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}
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void _GBHuC3(struct GBMemory* memory, uint16_t address, uint8_t value) {
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int bank = value & 0x3F;
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if (address & 0x1FFF) {
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mLOG(GB_MBC, STUB, "HuC-3 unknown value %04X:%02X", address, value);
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}
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switch (address >> 13) {
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case 0x0:
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switch (value) {
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case 0xA:
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memory->sramAccess = true;
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_switchSramBank(memory, memory->sramCurrentBank);
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break;
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default:
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memory->sramAccess = false;
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break;
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}
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break;
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case 0x1:
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mLOG(GB_MBC, STUB, "Bank switch %02X", value);
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_switchBank(memory, bank);
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break;
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case 0x2:
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_switchSramBank(memory, bank);
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break;
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default:
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// TODO
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mLOG(GB_MBC, STUB, "HuC-3 unknown address: %04X:%02X", address, value);
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break;
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}
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}
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void GBMemorySerialize(const struct GBMemory* memory, struct GBSerializedState* state) {
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void GBMemorySerialize(const struct GBMemory* memory, struct GBSerializedState* state) {
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memcpy(state->wram, memory->wram, GB_SIZE_WORKING_RAM);
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memcpy(state->wram, memory->wram, GB_SIZE_WORKING_RAM);
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memcpy(state->hram, memory->hram, GB_SIZE_HRAM);
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memcpy(state->hram, memory->hram, GB_SIZE_HRAM);
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