diff --git a/src/arm/isa-inlines.h b/src/arm/isa-inlines.h
index cee86e7d0..c3fa7e211 100644
--- a/src/arm/isa-inlines.h
+++ b/src/arm/isa-inlines.h
@@ -67,12 +67,12 @@
 
 #define ARM_WRITE_PC \
 	cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_ARM) + WORD_SIZE_ARM; \
-	cpu->memory->setActiveRegion(cpu->memory, cpu->gprs[ARM_PC]); \
+	cpu->memory->setActiveRegion(cpu->memory, cpu->gprs[ARM_PC] - WORD_SIZE_ARM); \
 	currentCycles += 2 + cpu->memory->activeNonseqCycles32 + cpu->memory->activePrefetchCycles32;
 
 #define THUMB_WRITE_PC \
 	cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -WORD_SIZE_THUMB) + WORD_SIZE_THUMB; \
-	cpu->memory->setActiveRegion(cpu->memory, cpu->gprs[ARM_PC]); \
+	cpu->memory->setActiveRegion(cpu->memory, cpu->gprs[ARM_PC] - WORD_SIZE_THUMB); \
 	currentCycles += 2 + cpu->memory->activeNonseqCycles16 + cpu->memory->activePrefetchCycles16;
 
 static inline int _ARMModeHasSPSR(enum PrivilegeMode mode) {