mirror of https://github.com/mgba-emu/mgba.git
GBA: Clean up I/O register read/write
This commit is contained in:
parent
a2bc814d9c
commit
534d4fe5ba
89
src/gba/io.c
89
src/gba/io.c
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@ -254,9 +254,9 @@ static const int _isRSpecialRegister[REG_MAX >> 1] = {
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1, 1, 1, 1, 1, 1, 1, 1,
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1, 1, 1, 1, 0, 0, 0, 0,
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// DMA
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0, 0, 0, 0, 0, 1, 0, 0,
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0, 0, 0, 1, 0, 0, 0, 0,
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0, 1, 0, 0, 0, 0, 0, 1,
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1, 1, 1, 1, 1, 1, 1, 1,
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1, 1, 1, 1, 1, 1, 1, 1,
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1, 1, 1, 1, 1, 1, 1, 1,
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0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0,
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// Timers
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@ -389,10 +389,11 @@ void GBAIOWrite(struct GBA* gba, uint32_t address, uint16_t value) {
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break;
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case REG_SOUNDCNT_HI:
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GBAAudioWriteSOUNDCNT_HI(&gba->audio, value);
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value &= 0x770F;
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break;
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case REG_SOUNDCNT_X:
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GBAAudioWriteSOUNDCNT_X(&gba->audio, value);
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value &= 0xFFFF;
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value &= 0x00F0;
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value |= gba->memory.io[REG_SOUNDCNT_X >> 1] & 0xF;
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break;
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case REG_SOUNDBIAS:
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@ -531,7 +532,7 @@ void GBAIOWrite(struct GBA* gba, uint32_t address, uint16_t value) {
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// Some bad interrupt libraries will write to this
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break;
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default:
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GBALog(gba, GBA_LOG_STUB, "Stub I/O register write: %03x", address);
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GBALog(gba, GBA_LOG_STUB, "Stub I/O register write: %03X", address);
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if (address >= REG_MAX) {
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GBALog(gba, GBA_LOG_GAME_ERROR, "Write to unused I/O register: %03X", address);
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return;
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@ -620,10 +621,22 @@ bool GBAIOIsReadConstant(uint32_t address) {
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case REG_WINOUT:
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case REG_BLDCNT:
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case REG_BLDALPHA:
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case REG_DMA0CNT_LO:
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case REG_DMA1CNT_LO:
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case REG_DMA2CNT_LO:
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case REG_DMA3CNT_LO:
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case REG_SOUND1CNT_LO:
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case REG_SOUND1CNT_HI:
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case REG_SOUND1CNT_X:
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case REG_SOUND2CNT_LO:
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case REG_SOUND2CNT_HI:
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case REG_SOUND3CNT_LO:
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case REG_SOUND3CNT_HI:
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case REG_SOUND3CNT_X:
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case REG_SOUND4CNT_LO:
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case REG_SOUND4CNT_HI:
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case REG_SOUNDCNT_LO:
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case REG_SOUNDCNT_HI:
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case REG_TM0CNT_HI:
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case REG_TM1CNT_HI:
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case REG_TM2CNT_HI:
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case REG_TM3CNT_HI:
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case REG_KEYINPUT:
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case REG_IE:
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return true;
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@ -671,12 +684,6 @@ uint16_t GBAIORead(struct GBA* gba, uint32_t address) {
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case REG_RCNT:
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return gba->sio.rcnt;
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case REG_DMA0CNT_LO:
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case REG_DMA1CNT_LO:
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case REG_DMA2CNT_LO:
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case REG_DMA3CNT_LO:
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// Write-only register
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return 0;
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case REG_BG0HOFS:
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case REG_BG0VOFS:
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case REG_BG1HOFS:
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@ -707,9 +714,42 @@ uint16_t GBAIORead(struct GBA* gba, uint32_t address) {
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case REG_WIN1V:
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case REG_MOSAIC:
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case REG_BLDY:
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case REG_FIFO_A_LO:
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case REG_FIFO_A_HI:
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case REG_FIFO_B_LO:
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case REG_FIFO_B_HI:
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case REG_DMA0SAD_LO:
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case REG_DMA0SAD_HI:
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case REG_DMA0DAD_LO:
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case REG_DMA0DAD_HI:
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case REG_DMA0CNT_LO:
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case REG_DMA1SAD_LO:
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case REG_DMA1SAD_HI:
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case REG_DMA1DAD_LO:
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case REG_DMA1DAD_HI:
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case REG_DMA1CNT_LO:
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case REG_DMA2SAD_LO:
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case REG_DMA2SAD_HI:
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case REG_DMA2DAD_LO:
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case REG_DMA2DAD_HI:
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case REG_DMA2CNT_LO:
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case REG_DMA3SAD_LO:
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case REG_DMA3SAD_HI:
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case REG_DMA3DAD_LO:
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case REG_DMA3DAD_HI:
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case REG_DMA3CNT_LO:
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// Write-only register
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GBALog(gba, GBA_LOG_GAME_ERROR, "Read from write-only I/O register: %03X", address);
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return GBALoad16(gba->cpu, 0x01000000, 0); // Simulate a bad load
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return GBALoadBad(gba->cpu);
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case REG_SOUNDBIAS:
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case REG_JOYCNT:
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case REG_JOY_RECV:
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case REG_JOY_TRANS:
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case REG_KEYCNT:
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case REG_POSTFLG:
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GBALog(gba, GBA_LOG_STUB, "Stub I/O register read: %03x", address);
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break;
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case REG_DISPCNT:
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case REG_DISPSTAT:
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case REG_VCOUNT:
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@ -733,6 +773,15 @@ uint16_t GBAIORead(struct GBA* gba, uint32_t address) {
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case REG_SOUND4CNT_HI:
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case REG_SOUNDCNT_LO:
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case REG_SOUNDCNT_HI:
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case REG_SOUNDCNT_X:
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case REG_WAVE_RAM0_LO:
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case REG_WAVE_RAM0_HI:
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case REG_WAVE_RAM1_LO:
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case REG_WAVE_RAM1_HI:
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case REG_WAVE_RAM2_LO:
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case REG_WAVE_RAM2_HI:
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case REG_WAVE_RAM3_LO:
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case REG_WAVE_RAM3_HI:
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case REG_DMA0CNT_HI:
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case REG_DMA1CNT_HI:
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case REG_DMA2CNT_HI:
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@ -752,12 +801,8 @@ uint16_t GBAIORead(struct GBA* gba, uint32_t address) {
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// Some bad interrupt libraries will read from this
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break;
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default:
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GBALog(gba, GBA_LOG_STUB, "Stub I/O register read: %03x", address);
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if (address >= REG_MAX) {
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GBALog(gba, GBA_LOG_GAME_ERROR, "Read from unused I/O register: %03X", address);
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return GBALoad16(gba->cpu, 0x01000000, 0);
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}
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break;
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GBALog(gba, GBA_LOG_GAME_ERROR, "Read from unused I/O register: %03X", address);
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return GBALoadBad(gba->cpu);
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}
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return gba->memory.io[address >> 1];
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}
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@ -374,6 +374,13 @@ static void GBASetActiveRegion(struct ARMCore* cpu, uint32_t address) {
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value |= value << 8; \
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value |= value << 16;
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uint32_t GBALoadBad(struct ARMCore* cpu) {
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struct GBA* gba = (struct GBA*) cpu->master;
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uint32_t value = 0;
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LOAD_BAD;
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return value;
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}
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uint32_t GBALoad32(struct ARMCore* cpu, uint32_t address, int* cycleCounter) {
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struct GBA* gba = (struct GBA*) cpu->master;
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struct GBAMemory* memory = &gba->memory;
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@ -1364,6 +1371,7 @@ uint16_t GBAMemoryWriteDMACNT_HI(struct GBA* gba, int dma, uint16_t control) {
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struct GBAMemory* memory = &gba->memory;
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struct GBADMA* currentDma = &memory->dma[dma];
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int wasEnabled = GBADMARegisterIsEnable(currentDma->reg);
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control &= 0xFFE0;
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currentDma->reg = control;
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if (GBADMARegisterIsDRQ(currentDma->reg)) {
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@ -151,6 +151,8 @@ uint32_t GBALoad32(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
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uint32_t GBALoad16(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
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uint32_t GBALoad8(struct ARMCore* cpu, uint32_t address, int* cycleCounter);
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uint32_t GBALoadBad(struct ARMCore* cpu);
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void GBAStore32(struct ARMCore* cpu, uint32_t address, int32_t value, int* cycleCounter);
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void GBAStore16(struct ARMCore* cpu, uint32_t address, int16_t value, int* cycleCounter);
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void GBAStore8(struct ARMCore* cpu, uint32_t address, int8_t value, int* cycleCounter);
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