mirror of https://github.com/mgba-emu/mgba.git
ARM Dynarec: First implementation
This commit is contained in:
Jeffrey Pfau
parent
85f96c1e63
commit
518d50c48c
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@ -487,12 +487,15 @@ if(USE_EPOXY)
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set(CPACK_DEBIAN_PACKAGE_DEPENDS "${CPACK_DEBIAN_PACKAGE_DEPENDS},libepoxy0")
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endif()
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set(FEATURE_DEFINES)
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foreach(FEATURE IN LISTS FEATURES)
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list(APPEND FEATURE_DEFINES "USE_${FEATURE}")
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endforeach()
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if (${CMAKE_SYSTEM_PROCESSOR} MATCHES "^armv[67]")
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file(GLOB ARM_DYNAREC_SRC ${CMAKE_CURRENT_SOURCE_DIR}/src/arm/dynarec-arm/*.c)
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endif()
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set(CORE_SRC)
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if(M_CORE_GB)
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add_definitions(-DM_CORE_GB)
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@ -507,6 +510,7 @@ if(M_CORE_GBA)
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add_definitions(-DM_CORE_GBA)
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list(APPEND CORE_SRC
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${ARM_SRC}
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${ARM_DYNAREC_SRC}
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${CMAKE_CURRENT_SOURCE_DIR}/src/arm/debugger/debugger.c
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${CMAKE_CURRENT_SOURCE_DIR}/src/arm/debugger/memory-debugger.c
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${GBA_SRC}
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@ -5,9 +5,10 @@
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#include "arm.h"
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#include "isa-arm.h"
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#include "isa-inlines.h"
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#include "isa-thumb.h"
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#include "arm/dynarec.h"
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#include "arm/isa-arm.h"
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#include "arm/isa-inlines.h"
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#include "arm/isa-thumb.h"
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static inline enum RegisterBank _ARMSelectBank(enum PrivilegeMode);
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@ -69,6 +70,8 @@ static inline enum RegisterBank _ARMSelectBank(enum PrivilegeMode mode) {
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}
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void ARMInit(struct ARMCore* cpu) {
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cpu->executor = ARM_DYNAREC;
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ARMDynarecInit(cpu);
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cpu->master->init(cpu, cpu->master);
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size_t i;
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for (i = 0; i < cpu->numComponents; ++i) {
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@ -88,6 +91,7 @@ void ARMDeinit(struct ARMCore* cpu) {
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cpu->components[i]->deinit(cpu->components[i]);
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}
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}
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ARMDynarecDeinit(cpu);
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}
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void ARMSetComponents(struct ARMCore* cpu, struct mCPUComponent* master, int extra, struct mCPUComponent** extras) {
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@ -143,6 +147,9 @@ void ARMReset(struct ARMCore* cpu) {
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cpu->nextEvent = 0;
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cpu->halted = 0;
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ARMDynarecDeinit(cpu);
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ARMDynarecInit(cpu);
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cpu->irqh.reset(cpu);
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}
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@ -294,6 +301,11 @@ void ARMRun(struct ARMCore* cpu) {
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}
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void ARMRunLoop(struct ARMCore* cpu) {
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if (cpu->dynarec.inDynarec) {
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cpu->dynarec.inDynarec = false;
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cpu->dynarec.currentEntry(cpu);
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return;
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}
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if (cpu->executionMode == MODE_THUMB) {
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while (cpu->cycles < cpu->nextEvent) {
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ThumbStep(cpu);
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@ -9,6 +9,8 @@
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#include "util/common.h"
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#include "core/cpu.h"
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#include "util/table.h"
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#include "util/bump-allocator.h"
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enum {
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ARM_SP = 13,
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@ -64,6 +66,11 @@ enum LSMDirection {
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LSM_DB = 3
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};
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enum ARMExecutor {
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ARM_INTERPRETER = 0,
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ARM_DYNAREC = 1,
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};
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struct ARMCore;
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union PSR {
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@ -131,6 +138,16 @@ struct ARMInterruptHandler {
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void (*hitStub)(struct ARMCore* cpu, uint32_t opcode);
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};
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struct ARMDynarec {
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bool inDynarec;
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struct BumpAllocator traceAlloc;
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struct Table armTraces;
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struct Table thumbTraces;
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void* buffer;
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void (*currentEntry)(struct ARMCore*);
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void* temporaryMemory;
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};
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struct ARMCore {
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int32_t gprs[16];
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union PSR cpsr;
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@ -153,6 +170,9 @@ struct ARMCore {
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struct ARMMemory memory;
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struct ARMInterruptHandler irqh;
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enum ARMExecutor executor;
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struct ARMDynarec dynarec;
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struct mCPUComponent* master;
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size_t numComponents;
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@ -0,0 +1,223 @@
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/* Copyright (c) 2013-2016 Jeffrey Pfau
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*
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#include "arm/decoder.h"
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#include "arm/dynarec.h"
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#include "arm/isa-thumb.h"
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#define OP_ADDI 0x02800000
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#define OP_BL 0x0B000000
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#define OP_CMP 0x01500000
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#define OP_LDMIA 0x08900000
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#define OP_LDRI 0x05100000
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#define OP_MOV 0x01A00000
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#define OP_MOVT 0x03400000
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#define OP_MOVW 0x03000000
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#define OP_POP 0x08BD0000
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#define OP_PUSH 0x092D0000
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#define OP_STMIA 0x08800000
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#define OP_STRI 0x05000000
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#define OP_SUBS 0x00500000
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#define COND_EQ 0x00000000
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#define COND_NE 0x10000000
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#define COND_MI 0x40000000
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#define COND_LE 0xD0000000
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#define COND_AL 0xE0000000
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static uint32_t calculateAddrMode1(unsigned imm) {
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if (imm < 0x100) {
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return imm;
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}
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int i;
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for (i = 0; i < 16; ++i) {
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unsigned t = ROR(imm, i * 2);
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if (t < 0x100) {
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return t | ((16 - i) << 8);
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}
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}
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abort();
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}
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static uint32_t emitADDI(unsigned dst, unsigned src, unsigned imm) {
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return OP_ADDI | calculateAddrMode1(imm) | (dst << 12) | (src << 16);
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}
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static uint32_t emitBL(void* base, void* target) {
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uint32_t diff = (intptr_t) target - (intptr_t) base - WORD_SIZE_ARM * 2;
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diff >>= 2;
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diff &= 0x00FFFFFF;
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return OP_BL | diff;
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}
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static uint32_t emitCMP(unsigned src1, unsigned src2) {
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return OP_CMP | src2 | (src1 << 16);
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}
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static uint32_t emitLDMIA(unsigned base, unsigned mask) {
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return OP_LDMIA | (base << 16) | mask;
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}
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static uint32_t emitLDRI(unsigned reg, unsigned base, int offset) {
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uint32_t op = OP_LDRI | (base << 16) | (reg << 12);
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if (offset > 0) {
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op |= 0x00800000 | offset;
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} else {
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op |= -offset & 0xFFF;
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}
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return op;
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}
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static uint32_t emitMOV(unsigned dst, unsigned src) {
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return OP_MOV | (dst << 12) | src;
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}
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static uint32_t emitMOVT(unsigned dst, uint16_t value) {
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return OP_MOVT | (dst << 12) | ((value & 0xF000) << 4) | (value & 0x0FFF);
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}
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static uint32_t emitMOVW(unsigned dst, uint16_t value) {
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return OP_MOVW | (dst << 12) | ((value & 0xF000) << 4) | (value & 0x0FFF);
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}
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static uint32_t emitPOP(unsigned mask) {
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return OP_POP | mask;
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}
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static uint32_t emitPUSH(unsigned mask) {
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return OP_PUSH | mask;
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}
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static uint32_t emitSTMIA(unsigned base, unsigned mask) {
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return OP_STMIA | (base << 16) | mask;
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}
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static uint32_t emitSTRI(unsigned reg, unsigned base, int offset) {
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uint32_t op = OP_STRI | (base << 16) | (reg << 12);
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if (offset > 0) {
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op |= 0x00800000 | offset;
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} else {
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op |= -offset & 0xFFF;
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}
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return op;
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}
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static uint32_t emitSUBS(unsigned dst, unsigned src1, unsigned src2) {
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return OP_SUBS | (dst << 12) | (src1 << 16) | src2;
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}
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static uint32_t* updatePC(uint32_t* code, uint32_t address) {
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*code++ = emitMOVW(5, address) | COND_AL;
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*code++ = emitMOVT(5, address >> 16) | COND_AL;
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*code++ = emitSTRI(5, 4, ARM_PC * sizeof(uint32_t)) | COND_AL;
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return code;
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}
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static uint32_t* updateEvents(uint32_t* code, struct ARMCore* cpu) {
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*code++ = emitADDI(0, 4, offsetof(struct ARMCore, cycles)) | COND_AL;
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*code++ = emitLDMIA(0, 6) | COND_AL;
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*code++ = emitSUBS(0, 2, 1) | COND_AL;
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*code++ = emitMOV(0, 4) | COND_AL;
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*code = emitBL(code, cpu->irqh.processEvents) | COND_LE;
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++code;
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*code++ = emitLDRI(1, 4, ARM_PC * sizeof(uint32_t)) | COND_AL;
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*code++ = emitCMP(1, 5) | COND_AL;
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*code++ = emitPOP(0x8030) | COND_NE;
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return code;
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}
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static uint32_t* flushPrefetch(uint32_t* code, uint32_t op0, uint32_t op1) {
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*code++ = emitMOVW(1, op0) | COND_EQ;
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if (op0 >= 0x10000) {
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*code++ = emitMOVT(1, op0 >> 16) | COND_EQ;
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}
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*code++ = emitMOVW(2, op1) | COND_EQ;
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if (op1 >= 0x10000) {
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*code++ = emitMOVT(2, op1 >> 16) | COND_EQ;
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}
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*code++ = emitADDI(0, 4, offsetof(struct ARMCore, prefetch)) | COND_EQ;
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*code++ = emitSTMIA(0, 6) | COND_EQ;
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return code;
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}
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static bool needsUpdateEvents(struct ARMInstructionInfo* info) {
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if (info->operandFormat & ARM_OPERAND_MEMORY) {
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return true;
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}
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if (info->branchType || info->traps) {
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return true;
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}
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return false;
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}
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static bool needsUpdatePC(struct ARMInstructionInfo* info) {
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if (needsUpdateEvents(info)) {
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return true;
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}
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if (info->operandFormat & ARM_OPERAND_REGISTER_1 && info->op1.reg == ARM_PC) {
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return true;
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}
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if (info->operandFormat & ARM_OPERAND_REGISTER_2 && info->op2.reg == ARM_PC) {
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return true;
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}
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if (info->operandFormat & ARM_OPERAND_REGISTER_3 && info->op3.reg == ARM_PC) {
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return true;
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}
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if (info->operandFormat & ARM_OPERAND_REGISTER_4 && info->op4.reg == ARM_PC) {
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return true;
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}
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if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_1 && info->op1.shifterReg == ARM_PC) {
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return true;
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}
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if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_2 && info->op2.shifterReg == ARM_PC) {
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return true;
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}
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if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_3 && info->op3.shifterReg == ARM_PC) {
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return true;
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}
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if (info->operandFormat & ARM_OPERAND_SHIFT_REGISTER_4 && info->op4.shifterReg == ARM_PC) {
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return true;
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}
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return false;
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}
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void ARMDynarecRecompileTrace(struct ARMCore* cpu, struct ARMDynarecTrace* trace) {
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#ifndef NDEBUG
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printf("%08X (%c)\n", trace->start, trace->mode == MODE_THUMB ? 'T' : 'A');
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#endif
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uint32_t* code = cpu->dynarec.buffer;
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uint32_t address = trace->start;
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if (trace->mode == MODE_ARM) {
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return;
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} else {
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trace->entry = (void (*)(struct ARMCore*)) code;
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*code++ = emitPUSH(0x4030) | COND_AL;
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*code++ = emitMOV(4, 0) | COND_AL;
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*code++ = emitLDRI(5, 0, ARM_PC * sizeof(uint32_t)) | COND_AL;
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struct ARMInstructionInfo info;
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while (true) {
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uint16_t instruction = cpu->memory.load16(cpu, address, 0);
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ARMDecodeThumb(instruction, &info);
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address += WORD_SIZE_THUMB;
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if (needsUpdatePC(&info)) {
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code = updatePC(code, address + WORD_SIZE_THUMB);
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}
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*code++ = emitMOVW(1, instruction) | COND_AL;
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*code = emitBL(code, _thumbTable[instruction >> 6]) | COND_AL;
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++code;
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if (needsUpdateEvents(&info)) {
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code = updateEvents(code, cpu);
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}
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if (info.branchType || info.traps) {
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break;
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}
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*code++ = emitMOV(0, 4) | COND_AL;
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}
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code = flushPrefetch(code, cpu->memory.load16(cpu, address, 0), cpu->memory.load16(cpu, address + WORD_SIZE_THUMB, 0));
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*code++ = emitPOP(0x8030) | COND_AL;
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}
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__clear_cache(trace->entry, code);
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cpu->dynarec.buffer = code;
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}
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@ -0,0 +1,69 @@
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/* Copyright (c) 2013-2016 Jeffrey Pfau
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*
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#include "dynarec.h"
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#include "arm/arm.h"
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#include "util/memory.h"
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#define ARM_DYNAREC_THRESHOLD 1
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void ARMDynarecInit(struct ARMCore* cpu) {
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BumpAllocatorInit(&cpu->dynarec.traceAlloc, sizeof(struct ARMDynarecTrace));
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TableInit(&cpu->dynarec.armTraces, 0x2000, 0);
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TableInit(&cpu->dynarec.thumbTraces, 0x2000, 0);
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cpu->dynarec.buffer = executableMemoryMap(0x100000);
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cpu->dynarec.temporaryMemory = anonymousMemoryMap(0x2000);
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}
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void ARMDynarecDeinit(struct ARMCore* cpu) {
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BumpAllocatorDeinit(&cpu->dynarec.traceAlloc);
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TableDeinit(&cpu->dynarec.armTraces);
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TableDeinit(&cpu->dynarec.thumbTraces);
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mappedMemoryFree(cpu->dynarec.buffer, 0x100000);
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mappedMemoryFree(cpu->dynarec.temporaryMemory, 0x2000);
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}
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static struct ARMDynarecTrace* ARMDynarecFindTrace(struct ARMCore* cpu, uint32_t address, enum ExecutionMode mode) {
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struct ARMDynarecTrace* trace;
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if (mode == MODE_ARM) {
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trace = TableLookup(&cpu->dynarec.armTraces, address >> 2);
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if (!trace) {
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trace = BumpAllocatorAlloc(&cpu->dynarec.traceAlloc);
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TableInsert(&cpu->dynarec.armTraces, address >> 2, trace);
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trace->hits = 0;
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trace->entry = NULL;
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trace->start = address;
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trace->mode = mode;
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}
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} else {
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trace = TableLookup(&cpu->dynarec.thumbTraces, address >> 1);
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if (!trace) {
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trace = BumpAllocatorAlloc(&cpu->dynarec.traceAlloc);
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TableInsert(&cpu->dynarec.thumbTraces, address >> 1, trace);
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trace->hits = 0;
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trace->entry = NULL;
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trace->start = address;
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trace->mode = mode;
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}
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}
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return trace;
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}
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void ARMDynarecCountTrace(struct ARMCore* cpu, uint32_t address, enum ExecutionMode mode) {
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struct ARMDynarecTrace* trace = ARMDynarecFindTrace(cpu, address, mode);
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if (trace->hits < ARM_DYNAREC_THRESHOLD) {
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++trace->hits;
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return;
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}
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if (!trace->entry) {
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ARMDynarecRecompileTrace(cpu, trace);
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}
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if (trace->entry) {
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cpu->dynarec.inDynarec = true;
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cpu->nextEvent = cpu->cycles;
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cpu->dynarec.currentEntry = trace->entry;
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}
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}
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@ -0,0 +1,29 @@
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/* Copyright (c) 2013-2016 Jeffrey Pfau
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*
|
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* This Source Code Form is subject to the terms of the Mozilla Public
|
||||
* License, v. 2.0. If a copy of the MPL was not distributed with this
|
||||
* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#ifndef ARM_DYNAREC_H
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#define ARM_DYNAREC_H
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#include "util/common.h"
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#include "arm/arm.h"
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struct ARMCore;
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enum ExecutionMode;
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struct ARMDynarecTrace {
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unsigned hits;
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enum ExecutionMode mode;
|
||||
uint32_t start;
|
||||
void (*entry)(struct ARMCore* cpu);
|
||||
};
|
||||
|
||||
void ARMDynarecInit(struct ARMCore* cpu);
|
||||
void ARMDynarecDeinit(struct ARMCore* cpu);
|
||||
|
||||
void ARMDynarecCountTrace(struct ARMCore* cpu, uint32_t address, enum ExecutionMode mode);
|
||||
void ARMDynarecRecompileTrace(struct ARMCore* cpu, struct ARMDynarecTrace* trace);
|
||||
|
||||
#endif
|
||||
|
|
@ -243,7 +243,11 @@ static void GBASetActiveRegion(struct ARMCore* cpu, uint32_t address) {
|
|||
gba->lastJump = address;
|
||||
memory->lastPrefetchedPc = 0;
|
||||
memory->lastPrefetchedLoads = 0;
|
||||
cpu->dynarec.inDynarec = false;
|
||||
if (newRegion == memory->activeRegion) {
|
||||
if (cpu->executor == ARM_DYNAREC && newRegion >= REGION_CART0) {
|
||||
ARMDynarecCountTrace(cpu, address,cpu->executionMode);
|
||||
}
|
||||
if (newRegion < REGION_CART0 || (address & (SIZE_CART0 - 1)) < memory->romSize) {
|
||||
return;
|
||||
}
|
||||
|
|
@ -255,6 +259,7 @@ static void GBASetActiveRegion(struct ARMCore* cpu, uint32_t address) {
|
|||
if (memory->activeRegion == REGION_BIOS) {
|
||||
memory->biosPrefetch = cpu->prefetch[1];
|
||||
}
|
||||
bool readonly = false;
|
||||
memory->activeRegion = newRegion;
|
||||
switch (newRegion) {
|
||||
case REGION_BIOS:
|
||||
|
|
@ -292,6 +297,7 @@ static void GBASetActiveRegion(struct ARMCore* cpu, uint32_t address) {
|
|||
case REGION_CART1_EX:
|
||||
case REGION_CART2:
|
||||
case REGION_CART2_EX:
|
||||
readonly = true;
|
||||
cpu->memory.activeRegion = memory->rom;
|
||||
cpu->memory.activeMask = memory->romMask;
|
||||
if ((address & (SIZE_CART0 - 1)) < memory->romSize) {
|
||||
|
|
@ -313,6 +319,10 @@ static void GBASetActiveRegion(struct ARMCore* cpu, uint32_t address) {
|
|||
cpu->memory.activeSeqCycles16 = memory->waitstatesSeq16[memory->activeRegion];
|
||||
cpu->memory.activeNonseqCycles32 = memory->waitstatesNonseq32[memory->activeRegion];
|
||||
cpu->memory.activeNonseqCycles16 = memory->waitstatesNonseq16[memory->activeRegion];
|
||||
|
||||
if (readonly && cpu->executor == ARM_DYNAREC) {
|
||||
ARMDynarecCountTrace(cpu, address,cpu->executionMode);
|
||||
}
|
||||
}
|
||||
|
||||
#define LOAD_BAD \
|
||||
|
|
|
|||
|
|
@ -11,6 +11,10 @@ void* anonymousMemoryMap(size_t size) {
|
|||
return mmap(0, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0);
|
||||
}
|
||||
|
||||
void* executableMemoryMap(size_t size) {
|
||||
return mmap(0, size, PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE | MAP_ANON, -1, 0);
|
||||
}
|
||||
|
||||
void mappedMemoryFree(void* memory, size_t size) {
|
||||
munmap(memory, size);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@
|
|||
#include "util/common.h"
|
||||
|
||||
void* anonymousMemoryMap(size_t size);
|
||||
void* executableMemoryMap(size_t size);
|
||||
void mappedMemoryFree(void* memory, size_t size);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue