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ARM7: Fix cycle counting for loads

This commit is contained in:
Jeffrey Pfau 2015-03-27 21:21:17 -07:00
parent afff253928
commit 45473bf7bc
3 changed files with 6 additions and 4 deletions
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1
CHANGES
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@ -59,6 +59,7 @@ Bugfixes:
- GBA: Fix timer initialization - GBA: Fix timer initialization
- GBA Memory: Fix I cycles that had been moved to ARM7 core - GBA Memory: Fix I cycles that had been moved to ARM7 core
- GBA Memory: Fix cycle counting for 32-bit load/stores - GBA Memory: Fix cycle counting for 32-bit load/stores
- ARM7: Fix cycle counting for loads
Misc: Misc:
- GBA Audio: Change internal audio sample buffer from 32-bit to 16-bit samples - GBA Audio: Change internal audio sample buffer from 32-bit to 16-bit samples
- GBA Memory: Simplify memory API and use fixed bus width - GBA Memory: Simplify memory API and use fixed bus width

6
src/arm/isa-arm.c
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@ -254,7 +254,7 @@ static inline void _immediate(struct ARMCore* cpu, uint32_t opcode) {
#define ADDR_MODE_4_WRITEBACK_STM cpu->gprs[rn] = address; #define ADDR_MODE_4_WRITEBACK_STM cpu->gprs[rn] = address;
#define ARM_LOAD_POST_BODY \ #define ARM_LOAD_POST_BODY \
++currentCycles; \ currentCycles += 1 + cpu->memory.activeNonseqCycles32 - cpu->memory.activeSeqCycles32; \
if (rd == ARM_PC) { \ if (rd == ARM_PC) { \
ARM_WRITE_PC; \ ARM_WRITE_PC; \
} }
@ -562,14 +562,14 @@ DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(STRT,
DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(LDM, DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(LDM,
load, load,
++currentCycles; currentCycles += 1 + cpu->memory.activeNonseqCycles32 - cpu->memory.activeSeqCycles32;
if (rs & 0x8000) { if (rs & 0x8000) {
ARM_WRITE_PC; ARM_WRITE_PC;
}) })
DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(STM, DEFINE_LOAD_STORE_MULTIPLE_INSTRUCTION_ARM(STM,
store, store,
currentCycles += cpu->memory.activeNonseqCycles32 - cpu->memory.activeSeqCycles32) ARM_STORE_POST_BODY;)
DEFINE_INSTRUCTION_ARM(SWP, DEFINE_INSTRUCTION_ARM(SWP,
int rm = opcode & 0xF; int rm = opcode & 0xF;

3
src/arm/isa-thumb.c
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@ -41,7 +41,8 @@
#define THUMB_PREFETCH_CYCLES (1 + cpu->memory.activeSeqCycles16) #define THUMB_PREFETCH_CYCLES (1 + cpu->memory.activeSeqCycles16)
#define THUMB_LOAD_POST_BODY ++currentCycles; #define THUMB_LOAD_POST_BODY \
currentCycles += 1 + cpu->memory.activeNonseqCycles16 - cpu->memory.activeSeqCycles16;
#define THUMB_STORE_POST_BODY \ #define THUMB_STORE_POST_BODY \
currentCycles += cpu->memory.activeNonseqCycles16 - cpu->memory.activeSeqCycles16; currentCycles += cpu->memory.activeNonseqCycles16 - cpu->memory.activeSeqCycles16;