mirror of https://github.com/mgba-emu/mgba.git
LR35902: Increment double-wide adds
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7a104c07a7
commit
4271d89129
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@ -19,7 +19,7 @@
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDB_), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDB_), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, ADDHL_BC), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_BC), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_BC), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, DECBC), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, DECBC), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, INCC), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, INCC), \
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@ -35,7 +35,7 @@
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDD_), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDD_), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, JR), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, JR), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, ADDHL_DE), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_DE), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_DE), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, DECDE), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, DECDE), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, INCE), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, INCE), \
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@ -51,7 +51,7 @@
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDH_), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDH_), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, JRZ), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, JRZ), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, ADDHL_HL), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_IHL), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_IHL), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, DECHL), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, DECHL), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, INCL), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, INCL), \
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@ -67,7 +67,7 @@
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDHL_), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDHL_), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, JRC), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, JRC), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, ADDHL_SP), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_DHL), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_DHL), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, DECSP), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, DECSP), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, INCA), \
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DECLARE_INSTRUCTION_LR35902(EMITTER, INCA), \
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@ -435,6 +435,25 @@ DEFINE_INCDEC_WIDE_INSTRUCTION_LR35902(BC);
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DEFINE_INCDEC_WIDE_INSTRUCTION_LR35902(DE);
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DEFINE_INCDEC_WIDE_INSTRUCTION_LR35902(DE);
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DEFINE_INCDEC_WIDE_INSTRUCTION_LR35902(HL);
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DEFINE_INCDEC_WIDE_INSTRUCTION_LR35902(HL);
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#define DEFINE_ADD_HL_INSTRUCTION_LR35902(REG, L, H) \
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DEFINE_INSTRUCTION_LR35902(ADDHL_ ## REG ## Finish, \
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int diff = H + cpu->h + cpu->f.c; \
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cpu->h = diff; \
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cpu->f.c = diff >= 0x100; \
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cpu->f.n = 0; \
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/* TODO: Find explanation of H flag */) \
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DEFINE_INSTRUCTION_LR35902(ADDHL_ ## REG, \
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int diff = L + cpu->l; \
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cpu->l = diff; \
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cpu->f.c = diff >= 0x100; \
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cpu->executionState = LR35902_CORE_STALL; \
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cpu->instruction = _LR35902InstructionADDHL_ ## REG ## Finish;)
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DEFINE_ADD_HL_INSTRUCTION_LR35902(BC, cpu->c, cpu->b);
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DEFINE_ADD_HL_INSTRUCTION_LR35902(DE, cpu->e, cpu->d);
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DEFINE_ADD_HL_INSTRUCTION_LR35902(HL, cpu->l, cpu->h);
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DEFINE_ADD_HL_INSTRUCTION_LR35902(SP, (cpu->sp & 0xFF), (cpu->sp >> 8));
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#define DEFINE_INC_INSTRUCTION_LR35902(NAME, OPERAND) \
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#define DEFINE_INC_INSTRUCTION_LR35902(NAME, OPERAND) \
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DEFINE_INSTRUCTION_LR35902(INC ## NAME, \
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DEFINE_INSTRUCTION_LR35902(INC ## NAME, \
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@ -505,7 +524,6 @@ DEFINE_INSTRUCTION_LR35902(DECSP,
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cpu->instruction = _LR35902InstructionPOP ## REG ## Delay; \
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cpu->instruction = _LR35902InstructionPOP ## REG ## Delay; \
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cpu->executionState = LR35902_CORE_MEMORY_LOAD;) \
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cpu->executionState = LR35902_CORE_MEMORY_LOAD;) \
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DEFINE_INSTRUCTION_LR35902(PUSH ## REG ## Finish, \
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DEFINE_INSTRUCTION_LR35902(PUSH ## REG ## Finish, \
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cpu->instruction = _LR35902InstructionNOP; \
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cpu->executionState = LR35902_CORE_STALL;) \
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cpu->executionState = LR35902_CORE_STALL;) \
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DEFINE_INSTRUCTION_LR35902(PUSH ## REG ## Delay, \
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DEFINE_INSTRUCTION_LR35902(PUSH ## REG ## Delay, \
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--cpu->sp; \
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--cpu->sp; \
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@ -43,7 +43,8 @@ enum LR35902ExecutionState {
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LR35902_CORE_MEMORY_LOAD = 4,
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LR35902_CORE_MEMORY_LOAD = 4,
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LR35902_CORE_MEMORY_STORE = 8,
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LR35902_CORE_MEMORY_STORE = 8,
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LR35902_CORE_READ_PC = 12,
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LR35902_CORE_READ_PC = 12,
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LR35902_CORE_STALL = 16
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LR35902_CORE_STALL = 16,
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LR35902_CORE_OP2 = 20
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};
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};
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struct LR35902Memory {
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struct LR35902Memory {
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