diff --git a/include/mgba/internal/ds/io.h b/include/mgba/internal/ds/io.h
index c2be86de0..b9d2730c2 100644
--- a/include/mgba/internal/ds/io.h
+++ b/include/mgba/internal/ds/io.h
@@ -38,6 +38,14 @@ enum DSIORegisters {
 	DS_REG_DMA3DAD_HI = 0x0DA,
 	DS_REG_DMA3CNT_LO = 0x0DC,
 	DS_REG_DMA3CNT_HI = 0x0DE,
+	DS_REG_DMA0FILL_LO = 0x0E0,
+	DS_REG_DMA0FILL_HI = 0x0E2,
+	DS_REG_DMA1FILL_LO = 0x0E4,
+	DS_REG_DMA1FILL_HI = 0x0E6,
+	DS_REG_DMA2FILL_LO = 0x0E8,
+	DS_REG_DMA2FILL_HI = 0x0EA,
+	DS_REG_DMA3FILL_LO = 0x0EC,
+	DS_REG_DMA3FILL_HI = 0x0EE,
 
 	// Timers
 	DS_REG_TM0CNT_LO = 0x100,
diff --git a/src/ds/io.c b/src/ds/io.c
index 4d75ae2b0..25273215d 100644
--- a/src/ds/io.c
+++ b/src/ds/io.c
@@ -29,6 +29,17 @@ static void _DSHaltCNT(struct DSCommon* dscore, uint8_t value) {
 
 static uint32_t DSIOWrite(struct DSCommon* dscore, uint32_t address, uint16_t value) {
 	switch (address) {
+	// DMA Fill
+	case DS_REG_DMA0FILL_LO:
+	case DS_REG_DMA0FILL_HI:
+	case DS_REG_DMA1FILL_LO:
+	case DS_REG_DMA1FILL_HI:
+	case DS_REG_DMA2FILL_LO:
+	case DS_REG_DMA2FILL_HI:
+	case DS_REG_DMA3FILL_LO:
+	case DS_REG_DMA3FILL_HI:
+		break;
+
 	// Timers
 	case DS_REG_TM0CNT_LO:
 		GBATimerWriteTMCNT_LO(&dscore->timers[0], value);
@@ -202,6 +213,14 @@ uint16_t DS7IORead(struct DS* ds, uint32_t address) {
 	case DS_REG_TM3CNT_LO:
 		DSIOUpdateTimer(&ds->ds7, address);
 		break;
+	case DS_REG_DMA0FILL_LO:
+	case DS_REG_DMA0FILL_HI:
+	case DS_REG_DMA1FILL_LO:
+	case DS_REG_DMA1FILL_HI:
+	case DS_REG_DMA2FILL_LO:
+	case DS_REG_DMA2FILL_HI:
+	case DS_REG_DMA3FILL_LO:
+	case DS_REG_DMA3FILL_HI:
 	case DS_REG_TM0CNT_HI:
 	case DS_REG_TM1CNT_HI:
 	case DS_REG_TM2CNT_HI:
@@ -333,6 +352,14 @@ uint16_t DS9IORead(struct DS* ds, uint32_t address) {
 	case DS_REG_TM3CNT_LO:
 		DSIOUpdateTimer(&ds->ds9, address);
 		break;
+	case DS_REG_DMA0FILL_LO:
+	case DS_REG_DMA0FILL_HI:
+	case DS_REG_DMA1FILL_LO:
+	case DS_REG_DMA1FILL_HI:
+	case DS_REG_DMA2FILL_LO:
+	case DS_REG_DMA2FILL_HI:
+	case DS_REG_DMA3FILL_LO:
+	case DS_REG_DMA3FILL_HI:
 	case DS_REG_TM0CNT_HI:
 	case DS_REG_TM1CNT_HI:
 	case DS_REG_TM2CNT_HI: