diff --git a/CHANGES b/CHANGES
index 97421694b..c4c6a3378 100644
--- a/CHANGES
+++ b/CHANGES
@@ -23,6 +23,7 @@ Bugfixes:
  - GBA Memory: Fix timing of DMAs
  - ARM7: Fix STRT/STRBT
  - ARM7: Implement undefined STRH/LDRH/LDRSH/LDRSB versions
+ - ARM7: Fix bank switching with LDR[B]T/STR[B]T
 Misc:
  - GBA Audio: Implement missing flags on SOUNDCNT_X register
 
diff --git a/src/arm/isa-arm.c b/src/arm/isa-arm.c
index c1e0d196f..6be407e7e 100644
--- a/src/arm/isa-arm.c
+++ b/src/arm/isa-arm.c
@@ -540,28 +540,32 @@ DEFINE_LOAD_STORE_MODE_3_INSTRUCTION_ARM(STRH, cpu->memory.store16(cpu, address,
 DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(LDRBT,
 	enum PrivilegeMode priv = cpu->privilegeMode;
 	ARMSetPrivilegeMode(cpu, MODE_USER);
-	cpu->gprs[rd] = cpu->memory.load8(cpu, address, &currentCycles);
+	int32_t r = cpu->memory.load8(cpu, address, &currentCycles);
 	ARMSetPrivilegeMode(cpu, priv);
+	cpu->gprs[rd] = r;
 	ARM_LOAD_POST_BODY;)
 
 DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(LDRT,
 	enum PrivilegeMode priv = cpu->privilegeMode;
 	ARMSetPrivilegeMode(cpu, MODE_USER);
-	cpu->gprs[rd] = cpu->memory.load32(cpu, address, &currentCycles);
+	int32_t r = cpu->memory.load32(cpu, address, &currentCycles);
 	ARMSetPrivilegeMode(cpu, priv);
+	cpu->gprs[rd] = r;
 	ARM_LOAD_POST_BODY;)
 
 DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(STRBT,
 	enum PrivilegeMode priv = cpu->privilegeMode;
+	int32_t r = cpu->gprs[rd];
 	ARMSetPrivilegeMode(cpu, MODE_USER);
-	cpu->memory.store8(cpu, address, cpu->gprs[rd], &currentCycles);
+	cpu->memory.store8(cpu, address, r, &currentCycles);
 	ARMSetPrivilegeMode(cpu, priv);
 	ARM_STORE_POST_BODY;)
 
 DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(STRT,
 	enum PrivilegeMode priv = cpu->privilegeMode;
+	int32_t r = cpu->gprs[rd];
 	ARMSetPrivilegeMode(cpu, MODE_USER);
-	cpu->memory.store32(cpu, address, cpu->gprs[rd], &currentCycles);
+	cpu->memory.store32(cpu, address, r, &currentCycles);
 	ARMSetPrivilegeMode(cpu, priv);
 	ARM_STORE_POST_BODY;)