mirror of https://github.com/mgba-emu/mgba.git
DS Memory: Allow ARM7 to use mapped VRAM
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0cb9c41a4a
commit
2f0ab002e2
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@ -264,8 +264,17 @@ static void DS7SetActiveRegion(struct ARMCore* cpu, uint32_t address) {
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cpu->memory.activeMask = DS_SIZE_RAM - 1;
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break;
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}
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goto jump_error;
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case DS_REGION_VRAM:
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if (address < 0x06040000 && ds->memory.vram7[(address & 0x3FFFF) >> 17]) {
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// TODO: redzones
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cpu->memory.activeRegion = (uint32_t*) ds->memory.vram7[(address & 0x3FFFF) >> 17];
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cpu->memory.activeMask = 0x1FFFF;
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break;
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}
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// Fall through
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default:
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jump_error:
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memory->activeRegion = -1;
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cpu->memory.activeRegion = _deadbeef;
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cpu->memory.activeMask = 0;
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@ -305,6 +314,12 @@ uint32_t DS7Load32(struct ARMCore* cpu, uint32_t address, int* cycleCounter) {
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case DS_REGION_IO:
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value = DS7IORead32(ds, address & 0x00FFFFFC);
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break;
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case DS_REGION_VRAM:
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if (address < 0x06040000 && memory->vram7[(address & 0x3FFFF) >> 17]) {
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LOAD_32(value, address & 0x1FFFC, memory->vram7[(address & 0x3FFFF) >> 17]);
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break;
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}
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// Fall through
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default:
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mLOG(DS_MEM, STUB, "Unimplemented DS7 Load32: %08X", address);
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break;
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@ -345,6 +360,12 @@ uint32_t DS7Load16(struct ARMCore* cpu, uint32_t address, int* cycleCounter) {
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case DS_REGION_IO:
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value = DS7IORead(ds, address & DS_OFFSET_MASK);
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break;
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case DS_REGION_VRAM:
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if (address < 0x06040000 && memory->vram7[(address & 0x3FFFF) >> 17]) {
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LOAD_16(value, address & 0x1FFFE, memory->vram7[(address & 0x3FFFF) >> 17]);
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break;
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}
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// Fall through
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default:
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mLOG(DS_MEM, STUB, "Unimplemented DS7 Load16: %08X", address);
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break;
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@ -418,6 +439,12 @@ void DS7Store32(struct ARMCore* cpu, uint32_t address, int32_t value, int* cycle
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case DS_REGION_IO:
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DS7IOWrite32(ds, address & DS_OFFSET_MASK, value);
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break;
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case DS_REGION_VRAM:
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if (address < 0x06040000 && memory->vram7[(address & 0x3FFFF) >> 17]) {
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STORE_32(value, address & 0x1FFFC, memory->vram7[(address & 0x3FFFF) >> 17]);
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break;
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}
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// Fall through
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default:
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mLOG(DS_MEM, STUB, "Unimplemented DS7 Store32: %08X:%08X", address, value);
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break;
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@ -452,6 +479,12 @@ void DS7Store16(struct ARMCore* cpu, uint32_t address, int16_t value, int* cycle
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case DS_REGION_IO:
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DS7IOWrite(ds, address & DS_OFFSET_MASK, value);
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break;
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case DS_REGION_VRAM:
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if (address < 0x06040000 && memory->vram7[(address & 0x3FFFF) >> 17]) {
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STORE_16(value, address & 0x1FFFE, memory->vram7[(address & 0x3FFFF) >> 17]);
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break;
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}
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// Fall through
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default:
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mLOG(DS_MEM, STUB, "Unimplemented DS7 Store16: %08X:%04X", address, value);
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break;
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@ -601,6 +634,13 @@ uint32_t DS7LoadMultiple(struct ARMCore* cpu, uint32_t address, int mask, enum L
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case DS_REGION_IO:
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LDM_LOOP(value = DS7IORead32(ds, address));
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break;
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case DS_REGION_VRAM:
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LDM_LOOP(if (address < 0x06040000 && memory->vram7[(address & 0x3FFFF) >> 17]) {
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LOAD_32(value, address & 0x1FFFF, memory->vram7[(address & 0x3FFFF) >> 17]);
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} else {
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mLOG(DS_MEM, STUB, "Unimplemented DS7 LDM: %08X", address);
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});
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break;
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default:
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mLOG(DS_MEM, STUB, "Unimplemented DS7 LDM: %08X", address);
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LDM_LOOP(value = 0);
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@ -660,6 +700,13 @@ uint32_t DS7StoreMultiple(struct ARMCore* cpu, uint32_t address, int mask, enum
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mLOG(DS_MEM, STUB, "Unimplemented DS9 STM: %08X", address);
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});
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break;
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case DS_REGION_VRAM:
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STM_LOOP(if (address < 0x06040000 && memory->vram7[(address & 0x3FFFF) >> 17]) {
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STORE_32(value, address & 0x1FFFF, memory->vram7[(address & 0x3FFFF) >> 17]);
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} else {
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mLOG(DS_MEM, STUB, "Unimplemented DS7 STM: %08X", address);
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});
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break;
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default:
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mLOG(DS_MEM, STUB, "Unimplemented DS9 STM: %08X", address);
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STM_LOOP();
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