mirror of https://github.com/mgba-emu/mgba.git
DS: Basic memory support for RAM
This commit is contained in:
parent
e93154fb41
commit
2006f27d6d
40
src/ds/ds.c
40
src/ds/ds.c
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@ -129,6 +129,27 @@ void DS7Reset(struct ARMCore* cpu) {
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cpu->gprs[ARM_SP] = DS7_SP_BASE_SVC;
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cpu->gprs[ARM_SP] = DS7_SP_BASE_SVC;
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ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
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ARMSetPrivilegeMode(cpu, MODE_SYSTEM);
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cpu->gprs[ARM_SP] = DS7_SP_BASE;
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cpu->gprs[ARM_SP] = DS7_SP_BASE;
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struct DS* ds = (struct DS*) cpu->master;
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DSMemoryReset(ds);
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struct DSCartridge* header = ds->romVf->map(ds->romVf, sizeof(*header), MAP_READ);
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if (header) {
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// TODO: Error check
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ds->romVf->seek(ds->romVf, header->arm7Offset, SEEK_SET);
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uint32_t base = header->arm7Base - DS_BASE_RAM;
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uint32_t* basePointer = &ds->memory.ram[base >> 2];
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if (base < DS_SIZE_RAM && base + header->arm7Size <= DS_SIZE_RAM) {
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ds->romVf->read(ds->romVf, basePointer, header->arm7Size);
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}
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cpu->gprs[12] = header->arm7Entry;
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cpu->gprs[ARM_LR] = header->arm7Entry;
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cpu->gprs[ARM_PC] = header->arm7Entry;
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int currentCycles = 0;
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ARM_WRITE_PC;
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ds->romVf->unmap(ds->romVf, header, sizeof(*header));
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}
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}
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}
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void DS9Reset(struct ARMCore* cpu) {
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void DS9Reset(struct ARMCore* cpu) {
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@ -140,7 +161,23 @@ void DS9Reset(struct ARMCore* cpu) {
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cpu->gprs[ARM_SP] = DS9_SP_BASE;
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cpu->gprs[ARM_SP] = DS9_SP_BASE;
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struct DS* ds = (struct DS*) cpu->master;
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struct DS* ds = (struct DS*) cpu->master;
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DSMemoryReset(ds);
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struct DSCartridge* header = ds->romVf->map(ds->romVf, sizeof(*header), MAP_READ);
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if (header) {
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// TODO: Error check
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ds->romVf->seek(ds->romVf, header->arm9Offset, SEEK_SET);
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uint32_t base = header->arm9Base - DS_BASE_RAM;
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uint32_t* basePointer = &ds->memory.ram[base >> 2];
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if (base < DS_SIZE_RAM && base + header->arm9Size <= DS_SIZE_RAM) {
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ds->romVf->read(ds->romVf, basePointer, header->arm9Size);
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}
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cpu->gprs[12] = header->arm9Entry;
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cpu->gprs[ARM_LR] = header->arm9Entry;
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cpu->gprs[ARM_PC] = header->arm9Entry;
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int currentCycles = 0;
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ARM_WRITE_PC;
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ds->romVf->unmap(ds->romVf, header, sizeof(*header));
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}
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}
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}
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static void DSProcessEvents(struct ARMCore* cpu) {
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static void DSProcessEvents(struct ARMCore* cpu) {
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@ -189,7 +226,6 @@ void DSDetachDebugger(struct DS* ds) {
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bool DSLoadROM(struct DS* ds, struct VFile* vf) {
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bool DSLoadROM(struct DS* ds, struct VFile* vf) {
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DSUnloadROM(ds);
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DSUnloadROM(ds);
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ds->romVf = vf;
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ds->romVf = vf;
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// TODO: Checksum?
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// TODO: error check
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// TODO: error check
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return true;
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return true;
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}
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}
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@ -5,8 +5,11 @@
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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* file, You can obtain one at http://mozilla.org/MPL/2.0/. */
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#include "memory.h"
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#include "memory.h"
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#include "arm/macros.h"
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#include "ds/ds.h"
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#include "ds/ds.h"
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#include "util/math.h"
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#include "util/math.h"
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#include "util/memory.h"
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mLOG_DEFINE_CATEGORY(DS_MEM, "DS Memory");
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mLOG_DEFINE_CATEGORY(DS_MEM, "DS Memory");
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@ -161,14 +164,29 @@ static void DS7SetActiveRegion(struct ARMCore* cpu, uint32_t address) {
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memory->activeRegion7 = newRegion;
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memory->activeRegion7 = newRegion;
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switch (newRegion) {
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switch (newRegion) {
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case DS7_REGION_BIOS:
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case DS_REGION_RAM:
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cpu->memory.activeRegion = memory->bios7;
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if ((address & (DS_SIZE_RAM - 1)) < DS_SIZE_RAM) {
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cpu->memory.activeMask = DS7_SIZE_BIOS - 1;
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cpu->memory.activeRegion = memory->ram;
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cpu->memory.activeMask = DS_SIZE_RAM - 1;
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return;
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}
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break;
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break;
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default:
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case DS7_REGION_BIOS:
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mLOG(DS_MEM, FATAL, "Jumped to invalid address: %08X", address);
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if (memory->bios7) {
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cpu->memory.activeRegion = memory->bios9;
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cpu->memory.activeMask = DS9_SIZE_BIOS - 1;
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} else {
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cpu->memory.activeRegion = _deadbeef;
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cpu->memory.activeMask = 0;
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}
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return;
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return;
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default:
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break;
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}
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}
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cpu->memory.activeRegion = _deadbeef;
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cpu->memory.activeMask = 0;
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mLOG(DS_MEM, FATAL, "Jumped to invalid address: %08X", address);
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return;
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}
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}
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uint32_t DS7Load32(struct ARMCore* cpu, uint32_t address, int* cycleCounter) {
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uint32_t DS7Load32(struct ARMCore* cpu, uint32_t address, int* cycleCounter) {
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@ -178,6 +196,11 @@ uint32_t DS7Load32(struct ARMCore* cpu, uint32_t address, int* cycleCounter) {
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int wait = 0;
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int wait = 0;
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switch (address >> DS_BASE_OFFSET) {
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switch (address >> DS_BASE_OFFSET) {
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case DS_REGION_RAM:
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if ((address & (DS_SIZE_RAM - 1)) < DS_SIZE_RAM) {
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LOAD_32(value, address & (DS_SIZE_RAM - 1), memory->ram);
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}
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break;
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default:
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default:
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break;
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break;
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}
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}
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@ -321,7 +344,7 @@ uint32_t DS7LoadMultiple(struct ARMCore* cpu, uint32_t address, int mask, enum L
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uint32_t DS7StoreMultiple(struct ARMCore* cpu, uint32_t address, int mask, enum LSMDirection direction, int* cycleCounter) {
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uint32_t DS7StoreMultiple(struct ARMCore* cpu, uint32_t address, int mask, enum LSMDirection direction, int* cycleCounter) {
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struct DS* ds = (struct ds*) cpu->master;
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struct DS* ds = (struct DS*) cpu->master;
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struct DSMemory* memory = &ds->memory;
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struct DSMemory* memory = &ds->memory;
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uint32_t value;
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uint32_t value;
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int wait = 0;
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int wait = 0;
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@ -368,8 +391,15 @@ static void DS9SetActiveRegion(struct ARMCore* cpu, uint32_t address) {
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int newRegion = address >> DS_BASE_OFFSET;
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int newRegion = address >> DS_BASE_OFFSET;
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memory->activeRegion7 = newRegion;
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memory->activeRegion9 = newRegion;
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switch (newRegion) {
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switch (newRegion) {
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case DS_REGION_RAM:
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if ((address & (DS_SIZE_RAM - 1)) < DS_SIZE_RAM) {
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cpu->memory.activeRegion = memory->ram;
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cpu->memory.activeMask = DS_SIZE_RAM - 1;
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return;
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}
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break;
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case DS9_REGION_BIOS:
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case DS9_REGION_BIOS:
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// TODO: Mask properly
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// TODO: Mask properly
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if (memory->bios9) {
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if (memory->bios9) {
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@ -379,11 +409,14 @@ static void DS9SetActiveRegion(struct ARMCore* cpu, uint32_t address) {
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cpu->memory.activeRegion = _deadbeef;
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cpu->memory.activeRegion = _deadbeef;
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cpu->memory.activeMask = 0;
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cpu->memory.activeMask = 0;
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}
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}
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break;
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default:
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mLOG(DS_MEM, FATAL, "Jumped to invalid address: %08X", address);
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return;
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return;
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default:
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break;
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}
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}
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cpu->memory.activeRegion = _deadbeef;
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cpu->memory.activeMask = 0;
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mLOG(DS_MEM, FATAL, "Jumped to invalid address: %08X", address);
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return;
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}
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}
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uint32_t DS9Load32(struct ARMCore* cpu, uint32_t address, int* cycleCounter) {
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uint32_t DS9Load32(struct ARMCore* cpu, uint32_t address, int* cycleCounter) {
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@ -393,6 +426,11 @@ uint32_t DS9Load32(struct ARMCore* cpu, uint32_t address, int* cycleCounter) {
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int wait = 0;
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int wait = 0;
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switch (address >> DS_BASE_OFFSET) {
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switch (address >> DS_BASE_OFFSET) {
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case DS_REGION_RAM:
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if ((address & (DS_SIZE_RAM - 1)) < DS_SIZE_RAM) {
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LOAD_32(value, address & (DS_SIZE_RAM - 1), memory->ram);
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}
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break;
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default:
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default:
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break;
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break;
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}
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}
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@ -536,7 +574,7 @@ uint32_t DS9LoadMultiple(struct ARMCore* cpu, uint32_t address, int mask, enum L
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uint32_t DS9StoreMultiple(struct ARMCore* cpu, uint32_t address, int mask, enum LSMDirection direction, int* cycleCounter) {
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uint32_t DS9StoreMultiple(struct ARMCore* cpu, uint32_t address, int mask, enum LSMDirection direction, int* cycleCounter) {
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struct DS* ds = (struct ds*) cpu->master;
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struct DS* ds = (struct DS*) cpu->master;
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struct DSMemory* memory = &ds->memory;
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struct DSMemory* memory = &ds->memory;
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uint32_t value;
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uint32_t value;
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int wait = 0;
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int wait = 0;
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