From 17b99e2b90ccebc0a3993b78871d8fff01d295e0 Mon Sep 17 00:00:00 2001 From: Jeffrey Pfau Date: Fri, 20 Nov 2015 19:10:17 -0800 Subject: [PATCH] ARM7: Fix STRT/STRBT --- CHANGES | 1 + src/arm/isa-arm.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/CHANGES b/CHANGES index 86a862548..d6e0f8bad 100644 --- a/CHANGES +++ b/CHANGES @@ -21,6 +21,7 @@ Bugfixes: - GBA BIOS: Fix misaligned RLUnCompReadNormalWrite* - Qt: Fix race condition with setting sample rate - GBA Memory: Fix timing of DMAs + - ARM7: Fix STRT/STRBT Misc: - GBA Audio: Implement missing flags on SOUNDCNT_X register diff --git a/src/arm/isa-arm.c b/src/arm/isa-arm.c index 83b59cc70..c1e0d196f 100644 --- a/src/arm/isa-arm.c +++ b/src/arm/isa-arm.c @@ -554,14 +554,14 @@ DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(LDRT, DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(STRBT, enum PrivilegeMode priv = cpu->privilegeMode; ARMSetPrivilegeMode(cpu, MODE_USER); - cpu->memory.store32(cpu, address, cpu->gprs[rd], ¤tCycles); + cpu->memory.store8(cpu, address, cpu->gprs[rd], ¤tCycles); ARMSetPrivilegeMode(cpu, priv); ARM_STORE_POST_BODY;) DEFINE_LOAD_STORE_T_INSTRUCTION_ARM(STRT, enum PrivilegeMode priv = cpu->privilegeMode; ARMSetPrivilegeMode(cpu, MODE_USER); - cpu->memory.store8(cpu, address, cpu->gprs[rd], ¤tCycles); + cpu->memory.store32(cpu, address, cpu->gprs[rd], ¤tCycles); ARMSetPrivilegeMode(cpu, priv); ARM_STORE_POST_BODY;)