From 1616ec83a23401103e9397d04ed46ef73fe3489f Mon Sep 17 00:00:00 2001 From: Jeffrey Pfau Date: Thu, 11 Apr 2013 02:13:35 -0700 Subject: [PATCH] Stub out incomplete addressing mode 1 opcodes --- src/isa-arm.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/isa-arm.c b/src/isa-arm.c index beda0f582..a4ecc0d7f 100644 --- a/src/isa-arm.c +++ b/src/isa-arm.c @@ -24,6 +24,7 @@ static inline void _shiftLSL(struct ARMCore* cpu, uint32_t opcode) { static inline void _shiftLSLR(struct ARMCore* cpu, uint32_t opcode) { int rm = opcode & 0x0000000F; + ARM_STUB; } static inline void _shiftLSR(struct ARMCore* cpu, uint32_t opcode) { @@ -40,6 +41,7 @@ static inline void _shiftLSR(struct ARMCore* cpu, uint32_t opcode) { static inline void _shiftLSRR(struct ARMCore* cpu, uint32_t opcode) { int rm = opcode & 0x0000000F; + ARM_STUB; } static inline void _shiftASR(struct ARMCore* cpu, uint32_t opcode) { @@ -56,15 +58,18 @@ static inline void _shiftASR(struct ARMCore* cpu, uint32_t opcode) { static inline void _shiftASRR(struct ARMCore* cpu, uint32_t opcode) { int rm = opcode & 0x0000000F; + ARM_STUB; } static inline void _shiftROR(struct ARMCore* cpu, uint32_t opcode) { int rm = opcode & 0x0000000F; int immediate = (opcode & 0x00000F80) >> 7; + ARM_STUB; } static inline void _shiftRORR(struct ARMCore* cpu, uint32_t opcode) { int rm = opcode & 0x0000000F; + ARM_STUB; } static inline void _immediate(struct ARMCore* cpu, uint32_t opcode) {