From 14100f19d15a7360c42bde4eaf69ec1e5c6ae4b1 Mon Sep 17 00:00:00 2001 From: Jeffrey Pfau Date: Sat, 20 Apr 2013 18:03:48 -0700 Subject: [PATCH] Implement LSL(2) --- src/arm/isa-thumb.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/src/arm/isa-thumb.c b/src/arm/isa-thumb.c index 3488e70e2..62d580c71 100644 --- a/src/arm/isa-thumb.c +++ b/src/arm/isa-thumb.c @@ -196,7 +196,23 @@ DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(SUB2, THUMB_SUBTRACTION(cpu->gprs[rd], cpu- DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(AND, cpu->gprs[rd] = cpu->gprs[rd] & cpu->gprs[rn]; THUMB_NEUTRAL_S( , , cpu->gprs[rd])) DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(EOR, cpu->gprs[rd] = cpu->gprs[rd] ^ cpu->gprs[rn]; THUMB_NEUTRAL_S( , , cpu->gprs[rd])) -DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSL2, ARM_STUB) +DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSL2, + int rs = cpu->gprs[rn] & 0xFF; + if (rs) { + if (rs < 32) { + cpu->cpsr.c = cpu->gprs[rd] & (1 << (32 - rs)); + cpu->gprs[rd] <<= rs; + } else { + if (rs > 32) { + cpu->cpsr.c = 0; + } else { + cpu->cpsr.c = cpu->gprs[rd] & 0x00000001; + } + cpu->gprs[rd] = 0; + } + } + THUMB_NEUTRAL_S( , , cpu->gprs[rd])) + DEFINE_DATA_FORM_5_INSTRUCTION_THUMB(LSR2, int rs = cpu->gprs[rn] & 0xFF; if (rs) {