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Make PPC asm directives a bit more resilient to different compilers

This commit is contained in:
Jeffrey Pfau 2014-10-01 09:33:37 +00:00
parent 996cfe8a26
commit 0a5a099059
1 changed files with 19 additions and 4 deletions
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23
src/arm/common.h
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@ -17,10 +17,25 @@
#define UNUSED(V) (void)(V)
#if defined(__PPC__) || defined(__POWERPC__)
#define LOAD_32(DEST, ADDR, ARR) asm("lwbrx %0, %1, %2" : "=r"(DEST) : "r"(ADDR), "r"(ARR))
#define LOAD_16(DEST, ADDR, ARR) asm("lhbrx %0, %1, %2" : "=r"(DEST) : "r"(ADDR), "r"(ARR))
#define STORE_32(SRC, ADDR, ARR) asm("stwbrx %0, %1, %2" : : "r"(SRC), "r"(ADDR), "r"(ARR))
#define STORE_16(SRC, ADDR, ARR) asm("sthbrx %0, %1, %2" : : "r"(SRC), "r"(ADDR), "r"(ARR))
#define LOAD_32(DEST, ADDR, ARR) { \
uint32_t _tmp = (ADDR); \
asm("lwbrx %0, %1, %2" : "=r"(DEST) : "r"(_tmp), "p"(ARR)); \
}
#define LOAD_16(DEST, ADDR, ARR) { \
uint16_t _tmp = (ADDR); \
asm("lhbrx %0, %1, %2" : "=r"(DEST) : "r"(_tmp), "p"(ARR)); \
}
#define STORE_32(SRC, ADDR, ARR) { \
uint32_t _tmp = (ADDR); \
asm("stwbrx %0, %1, %2" : : "r"(SRC), "r"(_tmp), "p"(ARR)); \
}
#define STORE_16(SRC, ADDR, ARR) { \
uint16_t _tmp = (ADDR); \
asm("sthbrx %0, %1, %2" : : "r"(SRC), "r"(_tmp), "p"(ARR)); \
}
#else
#define LOAD_32(DEST, ADDR, ARR) DEST = ((uint32_t*) ARR)[(ADDR) >> 2]
#define LOAD_16(DEST, ADDR, ARR) DEST = ((uint16_t*) ARR)[(ADDR) >> 1]