mirror of https://github.com/mgba-emu/mgba.git
GB MBC: Sachen MMC2 support
This commit is contained in:
parent
73f18f8049
commit
0676769b68
2
CHANGES
2
CHANGES
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@ -13,7 +13,7 @@ Features:
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- Additional scaling shaders
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- Support for GameShark Advance SP (.gsv) save file importing
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- Support for multiple saves per game using .sa2, .sa3, etc.
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- New unlicensed GB mappers: NT (newer type), Sachen (MMC1)
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- New unlicensed GB mappers: NT (newer type), Sachen (MMC1, MMC2)
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Emulation fixes:
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- ARM7: Fix unsigned multiply timing
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- GB: Copy logo from ROM if not running the BIOS intro (fixes mgba.io/i/2378)
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@ -248,6 +248,11 @@ struct GBMemory {
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uint8_t* wramBank;
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int wramCurrentBank;
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bool mbcReadBank0;
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bool mbcReadBank1;
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bool mbcReadHigh;
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bool mbcWriteHigh;
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bool sramAccess;
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bool directSramAccess;
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uint8_t* sram;
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@ -636,6 +636,10 @@ void GBSkipBIOS(struct GB* gb) {
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}
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}
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if (gb->memory.mbcType == GB_UNL_SACHEN_MMC2) {
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gb->memory.mbcState.sachen.locked = GB_SACHEN_UNLOCKED;
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}
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cpu->sp = 0xFFFE;
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cpu->pc = 0x100;
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@ -660,7 +664,7 @@ void GBMapBIOS(struct GB* gb) {
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if (gb->memory.rom) {
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memcpy(&gb->memory.romBase[size], &gb->memory.rom[size], GB_SIZE_CART_BANK0 - size);
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if (size > 0x100) {
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memcpy(&gb->memory.romBase[0x100], &gb->memory.rom[0x100], sizeof(struct GBCartridge));
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memcpy(&gb->memory.romBase[0x100], &gb->memory.rom[0x100], 0x100);
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}
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}
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}
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62
src/gb/mbc.c
62
src/gb/mbc.c
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@ -54,6 +54,7 @@ static uint8_t _GBPKJDRead(struct GBMemory*, uint16_t address);
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static uint8_t _GBBBDRead(struct GBMemory*, uint16_t address);
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static uint8_t _GBHitekRead(struct GBMemory*, uint16_t address);
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static uint8_t _GBSachenMMC1Read(struct GBMemory*, uint16_t address);
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static uint8_t _GBSachenMMC2Read(struct GBMemory*, uint16_t address);
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static uint8_t _GBPocketCamRead(struct GBMemory*, uint16_t address);
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static void _GBPocketCamCapture(struct GBMemory*);
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@ -204,6 +205,10 @@ static enum GBMemoryBankControllerType _detectUnlMBC(const uint8_t* mem, size_t
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return GB_UNL_SACHEN_MMC1;
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}
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if (mem[0x184] == 0xCE && mem[0x1C4] == 0xED && mem[0x194] == 0x66) {
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return GB_UNL_SACHEN_MMC2;
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}
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return GB_MBC_AUTODETECT;
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}
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@ -423,16 +428,31 @@ void GBMBCInit(struct GB* gb) {
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case GB_UNL_BBD:
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gb->memory.mbcWrite = _GBBBD;
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gb->memory.mbcRead = _GBBBDRead;
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gb->memory.mbcReadBank1 = true;
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break;
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case GB_UNL_HITEK:
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gb->memory.mbcWrite = _GBHitek;
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gb->memory.mbcRead = _GBHitekRead;
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gb->memory.mbcState.bbd.dataSwapMode = 7;
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gb->memory.mbcState.bbd.bankSwapMode = 7;
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gb->memory.mbcReadBank1 = true;
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break;
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case GB_UNL_SACHEN_MMC1:
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gb->memory.mbcWrite = _GBSachen;
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gb->memory.mbcRead = _GBSachenMMC1Read;
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gb->memory.mbcReadBank0 = true;
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gb->memory.mbcReadBank1 = true;
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break;
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case GB_UNL_SACHEN_MMC2:
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gb->memory.mbcWrite = _GBSachen;
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gb->memory.mbcRead = _GBSachenMMC2Read;
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gb->memory.mbcReadBank0 = true;
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gb->memory.mbcReadBank1 = true;
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gb->memory.mbcReadHigh = true;
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gb->memory.mbcWriteHigh = true;
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if (gb->sramSize) {
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gb->memory.sramAccess = true;
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}
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break;
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}
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@ -1760,6 +1780,12 @@ void _GBSachen(struct GB* gb, uint16_t address, uint8_t value) {
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GBMBCSwitchBank0(gb, state->baseBank & state->mask);
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}
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break;
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case 6:
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if (gb->memory.mbcType == GB_UNL_SACHEN_MMC2 && state->locked == GB_SACHEN_LOCKED_DMG) {
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state->locked = GB_SACHEN_LOCKED_CGB;
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state->transition = 0;
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}
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break;
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}
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}
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@ -1774,13 +1800,14 @@ static uint16_t _unscrambleSachen(uint16_t address) {
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uint8_t _GBSachenMMC1Read(struct GBMemory* memory, uint16_t address) {
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struct GBSachenState* state = &memory->mbcState.sachen;
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if (state->locked != GB_SACHEN_UNLOCKED) {
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if (state->locked != GB_SACHEN_UNLOCKED && (address & 0xFF00) == 0x100) {
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++state->transition;
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if (state->transition == 0x31) {
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state->locked = GB_SACHEN_UNLOCKED;
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}
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} else {
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address |= 0x80;
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}
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}
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if ((address & 0xFF00) == 0x0100) {
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address = _unscrambleSachen(address);
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@ -1795,6 +1822,37 @@ uint8_t _GBSachenMMC1Read(struct GBMemory* memory, uint16_t address) {
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}
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}
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uint8_t _GBSachenMMC2Read(struct GBMemory* memory, uint16_t address) {
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struct GBSachenState* state = &memory->mbcState.sachen;
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if (address >= 0xC000 && state->locked == GB_SACHEN_LOCKED_DMG) {
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state->transition = 0;
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state->locked = GB_SACHEN_LOCKED_CGB;
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}
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if (state->locked != GB_SACHEN_UNLOCKED && (address & 0x8700) == 0x0100) {
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++state->transition;
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if (state->transition == 0x31) {
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++state->locked;
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state->transition = 0;
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}
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}
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if ((address & 0xFF00) == 0x0100) {
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if (state->locked == GB_SACHEN_LOCKED_CGB) {
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address |= 0x80;
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}
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address = _unscrambleSachen(address);
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}
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if (address < GB_BASE_CART_BANK1) {
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return memory->romBase[address];
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} else if (address < GB_BASE_VRAM) {
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return memory->romBank[address & (GB_SIZE_CART_BANK0 - 1)];
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} else {
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return 0xFF;
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}
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}
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static void _appendSaveSuffix(struct GB* gb, const void* buffer, size_t size) {
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struct VFile* vf = gb->sramVf;
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if ((size_t) vf->size(vf) < gb->sramSize + size) {
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@ -73,7 +73,7 @@ static void GBSetActiveRegion(struct SM83Core* cpu, uint16_t address) {
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case GB_REGION_CART_BANK0 + 1:
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case GB_REGION_CART_BANK0 + 2:
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case GB_REGION_CART_BANK0 + 3:
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if ((gb->memory.mbcType & GB_UNL_SACHEN_MMC1) == GB_UNL_SACHEN_MMC1) {
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if (gb->memory.mbcReadBank0) {
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cpu->memory.cpuLoad8 = GBLoad8;
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break;
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}
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@ -94,7 +94,7 @@ static void GBSetActiveRegion(struct SM83Core* cpu, uint16_t address) {
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case GB_REGION_CART_BANK1 + 1:
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case GB_REGION_CART_BANK1 + 2:
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case GB_REGION_CART_BANK1 + 3:
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if ((gb->memory.mbcType & GB_UNL_BBD) == GB_UNL_BBD) {
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if (gb->memory.mbcReadBank1) {
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cpu->memory.cpuLoad8 = GBLoad8;
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break;
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}
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@ -249,7 +249,7 @@ uint8_t GBLoad8(struct SM83Core* cpu, uint16_t address) {
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case GB_REGION_CART_BANK0 + 3:
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if (address >= memory->romSize) {
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memory->cartBus = 0xFF;
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} else if ((memory->mbcType & GB_UNL_SACHEN_MMC1) == GB_UNL_SACHEN_MMC1) {
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} else if (gb->memory.mbcReadBank0) {
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memory->cartBus = memory->mbcRead(memory, address);
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} else {
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memory->cartBus = memory->romBase[address & (GB_SIZE_CART_BANK0 - 1)];
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@ -268,7 +268,7 @@ uint8_t GBLoad8(struct SM83Core* cpu, uint16_t address) {
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case GB_REGION_CART_BANK1 + 1:
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if (address >= memory->romSize) {
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memory->cartBus = 0xFF;
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} else if ((memory->mbcType & GB_UNL_BBD) == GB_UNL_BBD) {
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} else if (gb->memory.mbcReadBank1) {
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memory->cartBus = memory->mbcRead(memory, address);
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} else {
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memory->cartBus = memory->romBank[address & (GB_SIZE_CART_BANK0 - 1)];
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@ -298,8 +298,14 @@ uint8_t GBLoad8(struct SM83Core* cpu, uint16_t address) {
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return memory->cartBus;
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case GB_REGION_WORKING_RAM_BANK0:
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case GB_REGION_WORKING_RAM_BANK0 + 2:
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if (gb->memory.mbcReadHigh) {
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memory->mbcRead(memory, address);
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}
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return memory->wram[address & (GB_SIZE_WORKING_RAM_BANK0 - 1)];
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case GB_REGION_WORKING_RAM_BANK1:
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if (gb->memory.mbcReadHigh) {
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memory->mbcRead(memory, address);
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}
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return memory->wramBank[address & (GB_SIZE_WORKING_RAM_BANK0 - 1)];
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default:
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if (address < GB_BASE_OAM) {
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@ -373,9 +379,15 @@ void GBStore8(struct SM83Core* cpu, uint16_t address, int8_t value) {
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return;
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case GB_REGION_WORKING_RAM_BANK0:
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case GB_REGION_WORKING_RAM_BANK0 + 2:
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if (memory->mbcWriteHigh) {
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memory->mbcWrite(gb, address, value);
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}
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memory->wram[address & (GB_SIZE_WORKING_RAM_BANK0 - 1)] = value;
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return;
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case GB_REGION_WORKING_RAM_BANK1:
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if (memory->mbcWriteHigh) {
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memory->mbcWrite(gb, address, value);
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}
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memory->wramBank[address & (GB_SIZE_WORKING_RAM_BANK0 - 1)] = value;
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return;
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default:
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