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PowerPC: Fix potential register clobbering in LOAD_64LE

This commit is contained in:
Vicki Pfau 2018-05-25 17:33:59 -07:00
parent ed99f8b925
commit 064530e056
1 changed files with 4 additions and 4 deletions
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8
include/mgba-util/common.h
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@ -119,13 +119,13 @@ typedef intptr_t ssize_t;
#define STORE_32LE(SRC, ADDR, ARR) { \
uint32_t _addr = (ADDR); \
void* _ptr = (ARR); \
__asm__("stwbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr)); \
__asm__("stwbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr) : "memory"); \
}
#define STORE_16LE(SRC, ADDR, ARR) { \
uint32_t _addr = (ADDR); \
void* _ptr = (ARR); \
__asm__("sthbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr)); \
__asm__("sthbrx %0, %1, %2" : : "r"(SRC), "b"(_ptr), "r"(_addr) : "memory"); \
}
#define LOAD_64LE(DEST, ADDR, ARR) { \
@ -141,7 +141,7 @@ typedef intptr_t ssize_t;
__asm__( \
"lwbrx %0, %2, %3 \n" \
"lwbrx %1, %2, %4 \n" \
: "=r"(bswap->lo), "=r"(bswap->hi) : "b"(_ptr), "r"(_addr), "r"(_addr + 4)); \
: "=&r"(bswap->lo), "=&r"(bswap->hi) : "b"(_ptr), "r"(_addr), "r"(_addr + 4)) ; \
}
#define STORE_64LE(SRC, ADDR, ARR) { \
@ -157,7 +157,7 @@ typedef intptr_t ssize_t;
__asm__( \
"stwbrx %0, %2, %3 \n" \
"stwbrx %1, %2, %4 \n" \
: : "r"(bswap->hi), "r"(bswap->lo), "b"(_ptr), "r"(_addr), "r"(_addr + 4)); \
: : "r"(bswap->hi), "r"(bswap->lo), "b"(_ptr), "r"(_addr), "r"(_addr + 4) : "memory"); \
}
#elif defined(__llvm__) || (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)