From 01738f3bf60c25f9372396c542ebb0c91d9978e0 Mon Sep 17 00:00:00 2001
From: Vicki Pfau <vi@endrift.com>
Date: Wed, 12 Apr 2017 10:12:53 -0700
Subject: [PATCH] DS GX: Hack around writing to a full FIFO that has a swap
 pending (fixes mgba.io/i/608)

---
 CHANGES     | 1 +
 src/ds/gx.c | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/CHANGES b/CHANGES
index 1021a6da4..c6ca0b064 100644
--- a/CHANGES
+++ b/CHANGES
@@ -12,6 +12,7 @@ Bugfixes:
  - DS GX: Fix 4-color texture coordinates
  - DS GX: Reset polygon attributes between buffer swaps
  - DS Video: Fix blend bit on windows for 3D layer (fixes mgba.io/i/611)
+ - DS GX: Hack around writing to a full FIFO that has a swap pending (fixes mgba.io/i/608)
 Misc:
  - DS: Set boot complete bit in RAM on boot (fixes mgba.io/i/576, mgba.io/i/580, mgba.io/i/586)
  - DS Memory: Ensure DS9 I/O is 8-byte aligned
diff --git a/src/ds/gx.c b/src/ds/gx.c
index cea01bb2b..8f00e64e7 100644
--- a/src/ds/gx.c
+++ b/src/ds/gx.c
@@ -1374,6 +1374,11 @@ static void DSGXWriteFIFO(struct DSGX* gx, struct DSGXEntry entry) {
 		mLOG(DS_GX, INFO, "FIFO full");
 		while (gx->p->cpuBlocked & DS_CPU_BLOCK_GX) {
 			// Can happen from STM
+			if (gx->swapBuffers) {
+				// XXX: Let's hope those GX entries aren't important, since STM isn't preemptable
+				mLOG(DS_GX, ERROR, "FIFO full with swap pending");
+				return;
+			}
 			mTimingDeschedule(&gx->p->ds9.timing, &gx->fifoEvent);
 			_fifoRun(&gx->p->ds9.timing, gx, 0);
 		}