; this file was created with wlalink by ville helin <vhelin@iki.fi>.
; wla symbolic information for "/Users/vicki/Scratch/mooneye-gb/tests/build/acceptance/gpu/intr_2_mode0_timing_sprites.gb".

[labels]
01:4bff print_load_font
01:4c0c print_string
01:4c16 print_a
01:4c20 print_newline
01:4c2b print_digit
01:4c38 print_regs
01:4c41 _print_sl_data0
01:4c47 _print_sl_out0
01:4c54 _print_sl_data1
01:4c5a _print_sl_out1
01:4c6c _print_sl_data2
01:4c72 _print_sl_out2
01:4c7f _print_sl_data3
01:4c85 _print_sl_out3
01:4c97 _print_sl_data4
01:4c9d _print_sl_out4
01:4caa _print_sl_data5
01:4cb0 _print_sl_out5
01:4cc2 _print_sl_data6
01:4cc8 _print_sl_out6
01:4cd5 _print_sl_data7
01:4cdb _print_sl_out7
01:4000 font
00:c0c2 regs_save
00:c0c2 regs_save.f
00:c0c3 regs_save.a
00:c0c4 regs_save.c
00:c0c5 regs_save.b
00:c0c6 regs_save.e
00:c0c7 regs_save.d
00:c0c8 regs_save.l
00:c0c9 regs_save.h
00:c0ca regs_flags
00:c0cb regs_assert
00:c0cb regs_assert.f
00:c0cc regs_assert.a
00:c0cd regs_assert.c
00:c0ce regs_assert.b
00:c0cf regs_assert.e
00:c0d0 regs_assert.d
00:c0d1 regs_assert.l
00:c0d2 regs_assert.h
00:c0d3 memdump_len
00:c0d4 memdump_addr
01:47f0 memcpy
01:47f9 memset
01:4802 memcmp
01:4810 clear_vram
01:481a clear_oam
01:4824 disable_lcd_safe
01:482a _wait_ly_0
01:4830 _wait_ly_1
01:4839 reset_screen
01:484d process_results
01:4861 _wait_ly_2
01:4867 _wait_ly_3
01:487d _print_results_halt_0
01:4880 _process_results_cb
01:488b _print_sl_data8
01:4895 _print_sl_out8
01:48af _print_sl_data9
01:48ba _print_sl_out9
01:48d2 _print_sl_data10
01:48de _print_sl_out10
01:48df dump_mem
01:48fe _dump_mem_line
01:4928 _check_asserts
01:4936 _print_sl_data11
01:4939 _print_sl_out11
01:4945 _print_sl_data12
01:4947 _print_sl_out12
01:494f _print_sl_data13
01:4952 _print_sl_out13
01:495c __check_assert_fail0
01:4967 _print_sl_data14
01:496a _print_sl_out14
01:496d __check_assert_ok0
01:4975 _print_sl_data15
01:497a _print_sl_out15
01:497c __check_assert_skip0
01:4984 _print_sl_data16
01:498c _print_sl_out16
01:498c __check_assert_out0
01:4998 _print_sl_data17
01:499a _print_sl_out17
01:49a2 _print_sl_data18
01:49a5 _print_sl_out18
01:49af __check_assert_fail1
01:49ba _print_sl_data19
01:49bd _print_sl_out19
01:49c0 __check_assert_ok1
01:49c8 _print_sl_data20
01:49cd _print_sl_out20
01:49cf __check_assert_skip1
01:49d7 _print_sl_data21
01:49df _print_sl_out21
01:49df __check_assert_out1
01:49ea _print_sl_data22
01:49ed _print_sl_out22
01:49f9 _print_sl_data23
01:49fb _print_sl_out23
01:4a03 _print_sl_data24
01:4a06 _print_sl_out24
01:4a10 __check_assert_fail2
01:4a1b _print_sl_data25
01:4a1e _print_sl_out25
01:4a21 __check_assert_ok2
01:4a29 _print_sl_data26
01:4a2e _print_sl_out26
01:4a30 __check_assert_skip2
01:4a38 _print_sl_data27
01:4a40 _print_sl_out27
01:4a40 __check_assert_out2
01:4a4c _print_sl_data28
01:4a4e _print_sl_out28
01:4a56 _print_sl_data29
01:4a59 _print_sl_out29
01:4a63 __check_assert_fail3
01:4a6e _print_sl_data30
01:4a71 _print_sl_out30
01:4a74 __check_assert_ok3
01:4a7c _print_sl_data31
01:4a81 _print_sl_out31
01:4a83 __check_assert_skip3
01:4a8b _print_sl_data32
01:4a93 _print_sl_out32
01:4a93 __check_assert_out3
01:4a9e _print_sl_data33
01:4aa1 _print_sl_out33
01:4aad _print_sl_data34
01:4aaf _print_sl_out34
01:4ab7 _print_sl_data35
01:4aba _print_sl_out35
01:4ac4 __check_assert_fail4
01:4acf _print_sl_data36
01:4ad2 _print_sl_out36
01:4ad5 __check_assert_ok4
01:4add _print_sl_data37
01:4ae2 _print_sl_out37
01:4ae4 __check_assert_skip4
01:4aec _print_sl_data38
01:4af4 _print_sl_out38
01:4af4 __check_assert_out4
01:4b00 _print_sl_data39
01:4b02 _print_sl_out39
01:4b0a _print_sl_data40
01:4b0d _print_sl_out40
01:4b17 __check_assert_fail5
01:4b22 _print_sl_data41
01:4b25 _print_sl_out41
01:4b28 __check_assert_ok5
01:4b30 _print_sl_data42
01:4b35 _print_sl_out42
01:4b37 __check_assert_skip5
01:4b3f _print_sl_data43
01:4b47 _print_sl_out43
01:4b47 __check_assert_out5
01:4b52 _print_sl_data44
01:4b55 _print_sl_out44
01:4b61 _print_sl_data45
01:4b63 _print_sl_out45
01:4b6b _print_sl_data46
01:4b6e _print_sl_out46
01:4b78 __check_assert_fail6
01:4b83 _print_sl_data47
01:4b86 _print_sl_out47
01:4b89 __check_assert_ok6
01:4b91 _print_sl_data48
01:4b96 _print_sl_out48
01:4b98 __check_assert_skip6
01:4ba0 _print_sl_data49
01:4ba8 _print_sl_out49
01:4ba8 __check_assert_out6
01:4bb4 _print_sl_data50
01:4bb6 _print_sl_out50
01:4bbe _print_sl_data51
01:4bc1 _print_sl_out51
01:4bcb __check_assert_fail7
01:4bd6 _print_sl_data52
01:4bd9 _print_sl_out52
01:4bdc __check_assert_ok7
01:4be4 _print_sl_data53
01:4be9 _print_sl_out53
01:4beb __check_assert_skip7
01:4bf3 _print_sl_data54
01:4bfb _print_sl_out54
01:4bfb __check_assert_out7
00:0174 _testcase_data_0
00:0176 _testcase_end_0
00:0187 _testcase_data_1
00:018a _testcase_end_1
00:019b _testcase_data_2
00:019f _testcase_end_2
00:01b0 _testcase_data_3
00:01b5 _testcase_end_3
00:01c6 _testcase_data_4
00:01cc _testcase_end_4
00:01dd _testcase_data_5
00:01e4 _testcase_end_5
00:01f5 _testcase_data_6
00:01fd _testcase_end_6
00:020e _testcase_data_7
00:0217 _testcase_end_7
00:0228 _testcase_data_8
00:0232 _testcase_end_8
00:0243 _testcase_data_9
00:024e _testcase_end_9
00:025f _testcase_data_10
00:026a _testcase_end_10
00:027b _testcase_data_11
00:0286 _testcase_end_11
00:0297 _testcase_data_12
00:02a2 _testcase_end_12
00:02b3 _testcase_data_13
00:02be _testcase_end_13
00:02cf _testcase_data_14
00:02da _testcase_end_14
00:02eb _testcase_data_15
00:02f6 _testcase_end_15
00:0307 _testcase_data_16
00:0312 _testcase_end_16
00:0323 _testcase_data_17
00:032e _testcase_end_17
00:033f _testcase_data_18
00:034a _testcase_end_18
00:035b _testcase_data_19
00:0366 _testcase_end_19
00:0377 _testcase_data_20
00:0382 _testcase_end_20
00:0393 _testcase_data_21
00:039e _testcase_end_21
00:03af _testcase_data_22
00:03ba _testcase_end_22
00:03cb _testcase_data_23
00:03d6 _testcase_end_23
00:03e7 _testcase_data_24
00:03f2 _testcase_end_24
00:0403 _testcase_data_25
00:040e _testcase_end_25
00:041f _testcase_data_26
00:042a _testcase_end_26
00:043b _testcase_data_27
00:0446 _testcase_end_27
00:0457 _testcase_data_28
00:0462 _testcase_end_28
00:0473 _testcase_data_29
00:047e _testcase_end_29
00:048f _testcase_data_30
00:049a _testcase_end_30
00:04ab _testcase_data_31
00:04b6 _testcase_end_31
00:04c7 _testcase_data_32
00:04d2 _testcase_end_32
00:04e3 _testcase_data_33
00:04ee _testcase_end_33
00:04ff _testcase_data_34
00:050a _testcase_end_34
00:051b _testcase_data_35
00:0526 _testcase_end_35
00:0537 _testcase_data_36
00:0542 _testcase_end_36
00:0553 _testcase_data_37
00:055e _testcase_end_37
00:056f _testcase_data_38
00:057a _testcase_end_38
00:058b _testcase_data_39
00:0596 _testcase_end_39
00:05a7 _testcase_data_40
00:05b2 _testcase_end_40
00:05c3 _testcase_data_41
00:05ce _testcase_end_41
00:05df _testcase_data_42
00:05ea _testcase_end_42
00:05fb _testcase_data_43
00:0606 _testcase_end_43
00:0617 _testcase_data_44
00:0622 _testcase_end_44
00:0633 _testcase_data_45
00:063e _testcase_end_45
00:064f _testcase_data_46
00:065a _testcase_end_46
00:066b _testcase_data_47
00:0676 _testcase_end_47
00:0687 _testcase_data_48
00:0692 _testcase_end_48
00:06a3 _testcase_data_49
00:06ae _testcase_end_49
00:06bf _testcase_data_50
00:06ca _testcase_end_50
00:06db _testcase_data_51
00:06e6 _testcase_end_51
00:06f7 _testcase_data_52
00:06f9 _testcase_end_52
00:070a _testcase_data_53
00:070c _testcase_end_53
00:071d _testcase_data_54
00:071f _testcase_end_54
00:0730 _testcase_data_55
00:0732 _testcase_end_55
00:0743 _testcase_data_56
00:0745 _testcase_end_56
00:0756 _testcase_data_57
00:0758 _testcase_end_57
00:0769 _testcase_data_58
00:076b _testcase_end_58
00:077c _testcase_data_59
00:077e _testcase_end_59
00:078f _testcase_data_60
00:0791 _testcase_end_60
00:07a2 _testcase_data_61
00:07a4 _testcase_end_61
00:07b5 _testcase_data_62
00:07b7 _testcase_end_62
00:07c8 _testcase_data_63
00:07ca _testcase_end_63
00:07db _testcase_data_64
00:07dd _testcase_end_64
00:07ee _testcase_data_65
00:07f0 _testcase_end_65
00:0801 _testcase_data_66
00:0803 _testcase_end_66
00:0814 _testcase_data_67
00:0816 _testcase_end_67
00:0827 _testcase_data_68
00:0829 _testcase_end_68
00:083a _testcase_data_69
00:083c _testcase_end_69
00:084d _testcase_data_70
00:084f _testcase_end_70
00:0860 _testcase_data_71
00:0862 _testcase_end_71
00:0873 _testcase_data_72
00:0875 _testcase_end_72
00:0886 _testcase_data_73
00:0888 _testcase_end_73
00:0899 _testcase_data_74
00:089b _testcase_end_74
00:08ac _testcase_data_75
00:08ae _testcase_end_75
00:08bf _testcase_data_76
00:08c1 _testcase_end_76
00:08d2 _testcase_data_77
00:08d4 _testcase_end_77
00:08e5 _testcase_data_78
00:08e8 _testcase_end_78
00:08f9 _testcase_data_79
00:08fc _testcase_end_79
00:090d _testcase_data_80
00:0910 _testcase_end_80
00:0921 _testcase_data_81
00:0924 _testcase_end_81
00:0935 _testcase_data_82
00:0938 _testcase_end_82
00:0949 _testcase_data_83
00:094c _testcase_end_83
00:095d _testcase_data_84
00:0960 _testcase_end_84
00:0971 _testcase_data_85
00:0974 _testcase_end_85
00:0985 _testcase_data_86
00:0988 _testcase_end_86
00:0999 _testcase_data_87
00:099c _testcase_end_87
00:09ad _testcase_data_88
00:09b0 _testcase_end_88
00:09c1 _testcase_data_89
00:09c4 _testcase_end_89
00:09d5 _testcase_data_90
00:09d8 _testcase_end_90
00:09e9 _testcase_data_91
00:09ec _testcase_end_91
00:09fd _testcase_data_92
00:0a00 _testcase_end_92
00:0a11 _testcase_data_93
00:0a14 _testcase_end_93
00:0a25 _testcase_data_94
00:0a28 _testcase_end_94
00:0a39 _testcase_data_95
00:0a44 _testcase_end_95
00:0a55 _testcase_data_96
00:0a60 _testcase_end_96
00:0a71 _testcase_data_97
00:0a7c _testcase_end_97
00:0a8d _testcase_data_98
00:0a98 _testcase_end_98
00:0aa9 _testcase_data_99
00:0ab4 _testcase_end_99
00:0ac5 _testcase_data_100
00:0ad0 _testcase_end_100
00:0ae1 _testcase_data_101
00:0aec _testcase_end_101
00:0afd _testcase_data_102
00:0b08 _testcase_end_102
00:0b19 _testcase_data_103
00:0b24 _testcase_end_103
00:0b35 _testcase_data_104
00:0b40 _testcase_end_104
00:0b54 _wait_ly_4
00:0b5a _wait_ly_5
00:0b70 _print_results_halt_1
00:0b73 _test_ok_cb_0
00:0b7b _print_sl_data55
00:0b83 _print_sl_out55
00:0b86 run_testcase
00:0b88 _wait_ly_6
00:0b8e _wait_ly_7
00:0bb9 testcase_round_a
00:0bc4 testcase_round_a_ret
00:0bd4 testcase_round_b
00:0bdf testcase_round_b_ret
00:0bf0 prepare_sprites
00:0c06 prepare_nop_area
00:0c0f setup_and_wait_mode2
00:0c0f _wait_ly_8
00:0c32 test_fail
00:0c46 _wait_ly_9
00:0c4c _wait_ly_10
00:0c62 _print_results_halt_2
00:0c65 _test_fail_cb
00:0c6d _print_sl_data56
00:0c74 _print_sl_out56
00:0c82 _print_sl_data57
00:0c8a _print_sl_out57
00:0c8d fail_halt
00:0ca1 _wait_ly_11
00:0ca7 _wait_ly_12
00:0cbd _print_results_halt_3
00:0cc0 _test_failure_cb_0
00:0cc8 _print_sl_data58
00:0cd3 _print_sl_out58
00:c000 testcase_id
00:c002 nop_area_a
00:c062 nop_area_b
