161 lines
3.0 KiB
C++
161 lines
3.0 KiB
C++
/*
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Copyright 2016-2017 StapleButter
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This file is part of melonDS.
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melonDS is free software: you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation, either version 3 of the License, or (at your option)
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any later version.
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melonDS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with melonDS. If not, see http://www.gnu.org/licenses/.
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*/
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#include <stdio.h>
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#include "NDS.h"
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#include "ARM.h"
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#include "CP15.h"
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// derp
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namespace NDS
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{
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extern ARM* ARM9;
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}
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namespace CP15
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{
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u32 Control;
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u32 DTCMSetting, ITCMSetting;
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void Reset()
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{
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Control = 0x78; // dunno
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DTCMSetting = 0;
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ITCMSetting = 0;
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}
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void UpdateDTCMSetting()
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{
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if (Control & (1<<16))
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{
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NDS::ARM9DTCMBase = DTCMSetting & 0xFFFFF000;
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NDS::ARM9DTCMSize = 0x200 << ((DTCMSetting >> 1) & 0x1F);
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printf("DTCM [%08X] enabled at %08X, size %X\n", DTCMSetting, NDS::ARM9DTCMBase, NDS::ARM9DTCMSize);
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}
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else
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{
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NDS::ARM9DTCMBase = 0xFFFFFFFF;
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NDS::ARM9DTCMSize = 0;
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printf("DTCM disabled\n");
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}
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}
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void UpdateITCMSetting()
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{
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if (Control & (1<<18))
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{
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NDS::ARM9ITCMSize = 0x200 << ((ITCMSetting >> 1) & 0x1F);
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printf("ITCM [%08X] enabled at %08X, size %X\n", ITCMSetting, 0, NDS::ARM9ITCMSize);
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}
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else
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{
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NDS::ARM9ITCMSize = 0;
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printf("ITCM disabled\n");
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}
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}
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void Write(u32 id, u32 val)
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{
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switch (id)
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{
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case 0x100:
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val &= 0x000FF085;
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Control &= ~0x000FF085;
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Control |= val;
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UpdateDTCMSetting();
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UpdateITCMSetting();
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return;
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case 0x704:
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case 0x782:
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NDS::ARM9->Halt(1);
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return;
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case 0x761:
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//printf("inval data cache %08X\n", val);
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return;
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case 0x762:
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printf("inval data cache SI\n");
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return;
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case 0x7A1:
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printf("flush data cache %08X\n", val);
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return;
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case 0x7A2:
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printf("flush data cache SI\n");
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return;
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case 0x910:
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DTCMSetting = val;
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UpdateDTCMSetting();
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return;
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case 0x911:
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ITCMSetting = val;
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UpdateITCMSetting();
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return;
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}
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//printf("unknown CP15 write op %03X %08X\n", id, val);
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}
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u32 Read(u32 id)
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{
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switch (id)
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{
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case 0x000: // CPU ID
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case 0x003:
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case 0x004:
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case 0x005:
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case 0x006:
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case 0x007:
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return 0x41059461;
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case 0x001:
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// cache type. todo
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return 0;
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case 0x002: // TCM size
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return (6 << 6) | (5 << 18);
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case 0x100: // control reg
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return Control;
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case 0x910:
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return DTCMSetting;
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case 0x911:
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return ITCMSetting;
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}
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printf("unknown CP15 read op %03X\n", id);
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return 0;
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}
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}
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