ef75e3cdd1
JIT A64: fixes
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also update Switch code for latest libnx
2021-01-05 14:36:50 +01:00
82af9de9b6
Fix JIT linkage on ARM64 Macs ( #890 )
2020-12-24 11:23:29 +01:00
49b5860f0f
aligned_alloc instead of memalign
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also carry over new Switch changes
2020-12-09 18:58:51 +01:00
298b958e2a
Rename jit linkage asm files ( #836 )
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An extension of lower case s indicates to not run the
preprocessor while upper case S does. These files have defines.
2020-12-01 19:48:46 +01:00
78839f862e
JIT fixes
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- fix fastmem problems on linux
- small fix memory leak
- SlowWrite functions always take in a 32-bit variable so that the C compiler knows that the values aren't necessary zero extended
- a few other stylistic things
- handle SIGBUS as well (for macos)
2020-11-09 20:43:31 +01:00
45ea1fa990
Fix compilation issues on pedantic cpp compilers. ( #783 )
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* Fix compilation issues on pedantic cpp compilers.
* Avoid using fullblown static function.
2020-10-31 17:40:05 +01:00
0d845c9e69
Random minor fixes ( #757 )
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* Fix incorrect/questionable assert() usage
Originally reported by https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2159000700 ,
but also includes a bunch of other fixes.
* Fix some `printf` warnings
Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2160310550
* Remove useless check
It is never passed thanks to `if (num_in < 1) {...; return}` before
Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2154840804
* Add missing header guard, rename other to avoid conflicts
Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2163210746
* Make DSi_SDDevice destructor virtual
Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2158670642
* Use thread-safe localtime_r, assign `time` result directly
Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2154840805
* Fix MinGW build
It needs _POSIX_THREAD_SAFE_FUNCTIONS to export `localtime_r`
2020-10-01 13:44:09 +02:00
9772201345
remove some UB
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- savestates used to read a four bytes from a single byte value
- a few unassigned variables
- some other things
- also make the ROR macro an inline function
2020-09-04 20:37:14 +02:00
5903b11bda
subtract cycles after checking IRQ and Halt
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also switch back to adding to ARM::Cycles instead of subtracting from them
2020-07-27 23:14:39 +02:00
887ad27ed8
implement carry setting ALU op with imm
2020-07-25 22:08:43 +02:00
116d831cfd
Fix 16-bit DSi ARM9 read
2020-07-23 20:06:44 +00:00
f5130f82eb
Arisotura isn't the only derp
2020-07-23 19:56:09 +00:00
e85d2e2cf3
Use the correct slow path for block read/write
2020-07-23 19:12:25 +00:00
961b4252e2
Make it buildable on aarch64
2020-07-23 19:07:33 +00:00
3827fa562f
another try
2020-07-09 00:11:47 +02:00
3786660099
misc JIT changes
2020-07-08 23:08:25 +02:00
c5381d2911
reconcile DSi and JIT, fastmem for x64 and Windows
2020-06-30 23:50:41 +02:00
e335a8ca76
first steps in bringing over the JIT refactor/fastmem
2020-06-16 12:11:19 +02:00
0f53a34551
rewrite JIT memory emulation
2020-05-09 00:45:05 +02:00
5d0f244f3c
include more information in DataRegion
2020-04-26 13:05:16 +02:00
59f710158f
arm64 fix itcm invalidation and ldm^/stm^
2020-04-26 13:05:15 +02:00
05962d9798
the time of good commit names is long gone
2020-04-26 13:05:14 +02:00
266fd20ea5
fixup for aarch64 JIT
2020-04-26 13:05:12 +02:00
42d67c8145
fix LDM usermode for aarch64 as well
2020-04-26 13:05:12 +02:00
899cf97c51
apply fixes for aarch64 linux by @nadiaholmquist
2020-04-26 13:05:10 +02:00
d6cc7de6c4
move ARM64 JIT backend here
2020-04-26 13:05:09 +02:00
RSDuck