9394dde67a
fix copyright headers
2022-03-07 21:08:54 +01:00
35cc79787d
update copyright headers
2022-01-09 02:15:50 +01:00
436b3c4c1d
update copyright year and add missing GPL headers
2021-03-12 20:07:40 +01:00
e335a8ca76
first steps in bringing over the JIT refactor/fastmem
2020-06-16 12:11:19 +02:00
9b98b8816a
improve nop handling and proper behaviour for LDM^
...
fixes dslinux
2020-04-26 13:05:08 +02:00
81f38c14be
integrate changes from ARM64 backend and more
...
- better handle LDM/STM in reg alloc
- unify Halted and IRQ in anticipation for branch inlining
- literal optimisations can be disabled in gui
- jit blocks follow simple returns
- fix idle loop detection
- break jit blocks on IRQ (fixes saving in Pokemon White)
2020-04-26 13:05:05 +02:00
aa23f21b8d
decrease jit block cache address granularity
...
fixes Dragon Quest IX
move code with side effects out of assert, fixes release build
(thanks to m4wx for this one)
also remove some leftovers of jit pipelining
2020-04-26 13:05:05 +02:00
a687be9879
new block cache and much more...
...
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
and loads/stores from constant addresses
2020-04-26 13:05:03 +02:00
5338c28f40
load register only if needed
...
- do thumb bl long merge in the first step
- preparations for better branch jitting
2020-04-26 13:05:02 +02:00
5ea91b8a03
optimise away unneeded flag sets
...
- especially useful for thumb code and larger max block sizes
- can still be improved upon
2020-04-26 13:05:00 +02:00
4a0f6b3b4b
jit: fix thumb hi reg alu and mcr halt
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+ mcr/mrc aren't always, msr_imm is never unk on ARM7
2020-04-26 13:03:10 +02:00
c58fdbd66b
jit: branch instructions
2020-04-26 13:02:58 +02:00
5f932cdf48
JIT: compilation of word load and store
2020-04-26 13:02:56 +02:00
c5c342c009
JIT: base
...
all instructions are interpreted
2020-04-26 13:02:53 +02:00
Arisotura