f56aa60eb6
check IRQ first then Idle loop
...
apparently I put it this way for a reason
2020-07-28 00:44:58 +02:00
e63bd7e38c
for some reason tabs and spaces were mixed
2020-07-23 17:43:25 +02:00
778623a8b7
make linux work and fix a few bugs
2020-07-04 18:58:00 +02:00
c5381d2911
reconcile DSi and JIT, fastmem for x64 and Windows
2020-06-30 23:50:41 +02:00
e335a8ca76
first steps in bringing over the JIT refactor/fastmem
2020-06-16 12:11:19 +02:00
d91bbec08f
use instr hash as key for restore candidates
...
makes Golden Sun burn a little slower through the JIT memory
2020-05-09 14:36:18 +02:00
0f53a34551
rewrite JIT memory emulation
2020-05-09 00:45:05 +02:00
a9dd6e30ad
implement msr and mrs for the x64 JIT
2020-04-26 13:05:18 +02:00
3787bab1f6
implement block linking + some refactoring
...
currently only supported for x64
2020-04-26 13:05:17 +02:00
2dbb9840fb
re add error for unsupported JIT platforms
2020-04-26 13:05:11 +02:00
d6cc7de6c4
move ARM64 JIT backend here
2020-04-26 13:05:09 +02:00
9b98b8816a
improve nop handling and proper behaviour for LDM^
...
fixes dslinux
2020-04-26 13:05:08 +02:00
386100c053
make literal optimisation more reliable
...
fixes spanish Pokemon HeartGold
2020-04-26 13:05:06 +02:00
81f38c14be
integrate changes from ARM64 backend and more
...
- better handle LDM/STM in reg alloc
- unify Halted and IRQ in anticipation for branch inlining
- literal optimisations can be disabled in gui
- jit blocks follow simple returns
- fix idle loop detection
- break jit blocks on IRQ (fixes saving in Pokemon White)
2020-04-26 13:05:05 +02:00
aa23f21b8d
decrease jit block cache address granularity
...
fixes Dragon Quest IX
move code with side effects out of assert, fixes release build
(thanks to m4wx for this one)
also remove some leftovers of jit pipelining
2020-04-26 13:05:05 +02:00
a687be9879
new block cache and much more...
...
- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
and loads/stores from constant addresses
2020-04-26 13:05:03 +02:00
5338c28f40
load register only if needed
...
- do thumb bl long merge in the first step
- preparations for better branch jitting
2020-04-26 13:05:02 +02:00
ea562d2fec
fixes for flag optimisation
2020-04-26 13:05:01 +02:00
5ea91b8a03
optimise away unneeded flag sets
...
- especially useful for thumb code and larger max block sizes
- can still be improved upon
2020-04-26 13:05:00 +02:00
3001d9492c
abandon pipelining on jit
...
fixes Golden Sun Dawn
this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
2020-04-26 13:04:59 +02:00
5e443e7962
remove unneeded dolphin code, C++11 static_assert
2020-04-26 13:04:57 +02:00
4a0f6b3b4b
jit: fix thumb hi reg alu and mcr halt
...
+ mcr/mrc aren't always, msr_imm is never unk on ARM7
2020-04-26 13:03:10 +02:00
9d180c7bbc
jit: decrease blockcache AddrMapping size for ARM9
2020-04-26 13:03:09 +02:00
9d76d63af5
jit: make everything configurable
2020-04-26 13:03:03 +02:00
c58fdbd66b
jit: branch instructions
2020-04-26 13:02:58 +02:00
2c44bf927c
JIT: most mem instructions working
...
+ branching
2020-04-26 13:02:57 +02:00
5f932cdf48
JIT: compilation of word load and store
2020-04-26 13:02:56 +02:00
ebce9f035f
JIT: implemented most ALU instructions
2020-04-26 13:02:55 +02:00
c5c342c009
JIT: base
...
all instructions are interpreted
2020-04-26 13:02:53 +02:00
RSDuck