0f53a34551
rewrite JIT memory emulation
2020-05-09 00:45:05 +02:00
b0b9ec42e4
don't use param registers for ReadBanked/WriteBanked
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should fix linux build
2020-04-26 20:47:36 +02:00
a9dd6e30ad
implement msr and mrs for the x64 JIT
2020-04-26 13:05:18 +02:00
68d552074b
compile UMULLs and some fixes
2020-04-26 13:05:17 +02:00
3787bab1f6
implement block linking + some refactoring
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currently only supported for x64
2020-04-26 13:05:17 +02:00
9b98b8816a
improve nop handling and proper behaviour for LDM^
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fixes dslinux
2020-04-26 13:05:08 +02:00
a687be9879
new block cache and much more...
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- more reliable code invalidation detection
- blocks aren't stopped at any branch, but are being followed
if possible to get larger blocks
- idle loop recognition
- optimised literal loads, load/store cycle counting
and loads/stores from constant addresses
2020-04-26 13:05:03 +02:00
5338c28f40
load register only if needed
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- do thumb bl long merge in the first step
- preparations for better branch jitting
2020-04-26 13:05:02 +02:00
2ef776883f
more fixes for flag optimisation
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+ small cycle counting optimisation
2020-04-26 13:05:02 +02:00
5ea91b8a03
optimise away unneeded flag sets
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- especially useful for thumb code and larger max block sizes
- can still be improved upon
2020-04-26 13:05:00 +02:00
5e443e7962
remove unneeded dolphin code, C++11 static_assert
2020-04-26 13:04:57 +02:00
411fb57c07
jit: add compile option
2020-04-26 13:03:06 +02:00
9d76d63af5
jit: make everything configurable
2020-04-26 13:03:03 +02:00
dcf6e1cad2
jit: fix linux
2020-04-26 13:03:01 +02:00
9b3c14b58a
jit: SMULL and SMLAL
2020-04-26 13:03:00 +02:00
2efab201e9
jit: LDM/STM finally(!) working + MUL, MLA and CLZ
2020-04-26 13:02:59 +02:00
c58fdbd66b
jit: branch instructions
2020-04-26 13:02:58 +02:00
ff97211114
jit: thumb block transfer working
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also pc and sp relative loads and some refactoring
2020-04-26 13:02:57 +02:00
2c44bf927c
JIT: most mem instructions working
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+ branching
2020-04-26 13:02:57 +02:00
5f932cdf48
JIT: compilation of word load and store
2020-04-26 13:02:56 +02:00
ebce9f035f
JIT: implemented most ALU instructions
2020-04-26 13:02:55 +02:00
c5c342c009
JIT: base
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all instructions are interpreted
2020-04-26 13:02:53 +02:00
RSDuck