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fix some gaps in the SPI/cart implementations

This commit is contained in:
Arisotura 2022-03-14 00:27:03 +01:00
parent 89d33fedd2
commit fb7bea06f8
2 changed files with 16 additions and 8 deletions
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19
src/NDSCart.cpp
View File

@ -1802,9 +1802,8 @@ void ROMPrepareData(u32 param)
void WriteROMCnt(u32 val)
{
ROMCnt = (val & 0xFF7F7FFF) | (ROMCnt & 0x00800000);
if (!(SPICnt & (1<<15))) return;
u32 xferstart = (val & ~ROMCnt) & (1<<31);
ROMCnt = (val & 0xFF7F7FFF) | (ROMCnt & 0x20800000);
// all this junk would only really be useful if melonDS was interfaced to
// a DS cart reader
@ -1828,7 +1827,11 @@ void WriteROMCnt(u32 val)
printf("key2 Y: %02X%08X\n", (u32)(Key2_Y>>32), (u32)Key2_Y);
}
if (!(ROMCnt & (1<<31))) return;
// transfers will only start when bit31 changes from 0 to 1
// and if AUXSPICNT is configured correctly
if (!(SPICnt & (1<<15))) return;
if (SPICnt & (1<<13)) return;
if (!xferstart) return;
u32 datasize = (ROMCnt >> 24) & 0x7;
if (datasize == 7)
@ -1867,6 +1870,7 @@ void WriteROMCnt(u32 val)
// thus a command would take 8 cycles to be transferred
// and it would take 4 cycles to receive a word of data
// TODO: advance read position if bit28 is set
// TODO: during a write transfer, bit23 is set immediately when beginning the transfer(?)
u32 xfercycle = (ROMCnt & (1<<27)) ? 8 : 5;
u32 cmddelay = 8;
@ -1947,6 +1951,10 @@ void WriteSPICnt(u16 val)
}
SPICnt = (SPICnt & 0x0080) | (val & 0xE043);
// AUXSPICNT can be changed during a transfer
// in this case, the transfer continues until the end, even if bit13 or bit15 are cleared
// if the transfer speed is changed, the transfer continues at the new speed (TODO)
if (SPICnt & (1<<7))
printf("!! CHANGING AUXSPICNT DURING TRANSFER: %04X\n", val);
}
@ -1969,8 +1977,7 @@ void WriteSPIData(u8 val)
{
if (!(SPICnt & (1<<15))) return;
if (!(SPICnt & (1<<13))) return;
if (SPICnt & (1<<7)) printf("!! WRITING AUXSPIDATA DURING PENDING TRANSFER\n");
if (SPICnt & (1<<7)) return;
SPICnt |= (1<<7);

5
src/SPI.cpp
View File

@ -896,6 +896,8 @@ void WriteCnt(u16 val)
}
}
// TODO: presumably the transfer speed can be changed during a transfer
// like with the NDSCart SPI interface
Cnt = (Cnt & 0x0080) | (val & 0xCF03);
if (val & 0x0400) printf("!! CRAPOED 16BIT SPI MODE\n");
if (Cnt & (1<<7)) printf("!! CHANGING SPICNT DURING TRANSFER: %04X\n", val);
@ -930,8 +932,7 @@ u8 ReadData()
void WriteData(u8 val)
{
if (!(Cnt & (1<<15))) return;
if (Cnt & (1<<7)) printf("!! WRITING AUXSPIDATA DURING PENDING TRANSFER\n");
if (Cnt & (1<<7)) return;
Cnt |= (1<<7);
switch (Cnt & 0x0300)