Merge branch 'master' of https://github.com/StapleButter/melonDS
This commit is contained in:
commit
fb284f33ad
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@ -84,13 +84,14 @@ if (UNIX)
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FIND_PACKAGE(PkgConfig REQUIRED)
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FIND_PACKAGE(PkgConfig REQUIRED)
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PKG_CHECK_MODULES(GTK3 REQUIRED gtk+-3.0)
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PKG_CHECK_MODULES(GTK3 REQUIRED gtk+-3.0)
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PKG_CHECK_MODULES(SDL2 REQUIRED sdl2)
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INCLUDE_DIRECTORIES(${GTK3_INCLUDE_DIRS})
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INCLUDE_DIRECTORIES(${GTK3_INCLUDE_DIRS} ${SDL2_INCLUDE_DIRS})
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LINK_LIBRARIES(${GTK3_LIBRARIES})
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LINK_LIBRARIES(${GTK3_LIBRARIES} ${SDL2_LIBRARIES})
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ADD_DEFINITIONS(${GTK3_CFLAGS_OTHER})
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ADD_DEFINITIONS(${GTK3_CFLAGS_OTHER})
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add_custom_command(OUTPUT melon_grc.c
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add_custom_command(OUTPUT melon_grc.c
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COMMAND glib-compile-resources --sourcedir="${CMAKE_CURRENT_SOURCE_DIR}"
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COMMAND glib-compile-resources --sourcedir="${CMAKE_CURRENT_SOURCE_DIR}"
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--target="${CMAKE_CURRENT_BINARY_DIR}/melon_grc.c"
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--target="${CMAKE_CURRENT_BINARY_DIR}/melon_grc.c"
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--generate-source "${CMAKE_CURRENT_SOURCE_DIR}/melon_grc.xml"
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--generate-source "${CMAKE_CURRENT_SOURCE_DIR}/melon_grc.xml"
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50
src/NDS.cpp
50
src/NDS.cpp
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@ -57,7 +57,7 @@ u32 CPUStop;
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u8 ARM9BIOS[0x1000];
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u8 ARM9BIOS[0x1000];
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u8 ARM7BIOS[0x4000];
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u8 ARM7BIOS[0x4000];
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u8 MainRAM[0x400000];
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u8 MainRAM[MAIN_RAM_SIZE];
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u8 SharedWRAM[0x8000];
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u8 SharedWRAM[0x8000];
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u8 WRAMCnt;
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u8 WRAMCnt;
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@ -285,7 +285,7 @@ void Reset()
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fclose(f);
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fclose(f);
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}
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}
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memset(MainRAM, 0, 0x400000);
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memset(MainRAM, 0, MAIN_RAM_SIZE);
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memset(SharedWRAM, 0, 0x8000);
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memset(SharedWRAM, 0, 0x8000);
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memset(ARM7WRAM, 0, 0x10000);
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memset(ARM7WRAM, 0, 0x10000);
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@ -1110,7 +1110,7 @@ u8 ARM9Read8(u32 addr)
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switch (addr & 0xFF000000)
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switch (addr & 0xFF000000)
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{
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{
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case 0x02000000:
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case 0x02000000:
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return *(u8*)&MainRAM[addr & 0x3FFFFF];
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return *(u8*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
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case 0x03000000:
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case 0x03000000:
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if (SWRAM_ARM9) return *(u8*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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if (SWRAM_ARM9) return *(u8*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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@ -1159,7 +1159,7 @@ u16 ARM9Read16(u32 addr)
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switch (addr & 0xFF000000)
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switch (addr & 0xFF000000)
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{
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{
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case 0x02000000:
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case 0x02000000:
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return *(u16*)&MainRAM[addr & 0x3FFFFF];
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return *(u16*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
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case 0x03000000:
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case 0x03000000:
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if (SWRAM_ARM9) return *(u16*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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if (SWRAM_ARM9) return *(u16*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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@ -1208,7 +1208,7 @@ u32 ARM9Read32(u32 addr)
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switch (addr & 0xFF000000)
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switch (addr & 0xFF000000)
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{
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{
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case 0x02000000:
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case 0x02000000:
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return *(u32*)&MainRAM[addr & 0x3FFFFF];
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return *(u32*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
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case 0x03000000:
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case 0x03000000:
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if (SWRAM_ARM9) return *(u32*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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if (SWRAM_ARM9) return *(u32*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask];
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@ -1252,7 +1252,7 @@ void ARM9Write8(u32 addr, u8 val)
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switch (addr & 0xFF000000)
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switch (addr & 0xFF000000)
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{
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{
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case 0x02000000:
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case 0x02000000:
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*(u8*)&MainRAM[addr & 0x3FFFFF] = val;
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*(u8*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
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return;
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return;
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case 0x03000000:
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case 0x03000000:
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@ -1277,7 +1277,7 @@ void ARM9Write16(u32 addr, u16 val)
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switch (addr & 0xFF000000)
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switch (addr & 0xFF000000)
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{
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{
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case 0x02000000:
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case 0x02000000:
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*(u16*)&MainRAM[addr & 0x3FFFFF] = val;
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*(u16*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
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return;
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return;
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case 0x03000000:
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case 0x03000000:
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@ -1316,7 +1316,7 @@ void ARM9Write32(u32 addr, u32 val)
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switch (addr & 0xFF000000)
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switch (addr & 0xFF000000)
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{
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{
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case 0x02000000:
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case 0x02000000:
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*(u32*)&MainRAM[addr & 0x3FFFFF] = val;
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*(u32*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
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return;
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return;
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case 0x03000000:
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case 0x03000000:
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@ -1368,7 +1368,7 @@ u8 ARM7Read8(u32 addr)
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{
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{
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case 0x02000000:
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case 0x02000000:
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case 0x02800000:
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case 0x02800000:
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return *(u8*)&MainRAM[addr & 0x3FFFFF];
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return *(u8*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
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case 0x03000000:
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case 0x03000000:
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if (SWRAM_ARM7) return *(u8*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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if (SWRAM_ARM7) return *(u8*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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@ -1405,7 +1405,7 @@ u16 ARM7Read16(u32 addr)
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{
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{
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case 0x02000000:
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case 0x02000000:
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case 0x02800000:
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case 0x02800000:
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return *(u16*)&MainRAM[addr & 0x3FFFFF];
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return *(u16*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
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case 0x03000000:
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case 0x03000000:
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if (SWRAM_ARM7) return *(u16*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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if (SWRAM_ARM7) return *(u16*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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@ -1445,7 +1445,7 @@ u32 ARM7Read32(u32 addr)
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{
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{
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case 0x02000000:
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case 0x02000000:
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case 0x02800000:
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case 0x02800000:
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return *(u32*)&MainRAM[addr & 0x3FFFFF];
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return *(u32*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)];
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case 0x03000000:
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case 0x03000000:
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if (SWRAM_ARM7) return *(u32*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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if (SWRAM_ARM7) return *(u32*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask];
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@ -1475,7 +1475,7 @@ void ARM7Write8(u32 addr, u8 val)
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{
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{
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case 0x02000000:
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case 0x02000000:
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case 0x02800000:
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case 0x02800000:
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*(u8*)&MainRAM[addr & 0x3FFFFF] = val;
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*(u8*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
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return;
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return;
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case 0x03000000:
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case 0x03000000:
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@ -1506,7 +1506,7 @@ void ARM7Write16(u32 addr, u16 val)
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{
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{
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case 0x02000000:
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case 0x02000000:
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case 0x02800000:
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case 0x02800000:
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*(u16*)&MainRAM[addr & 0x3FFFFF] = val;
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*(u16*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
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return;
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return;
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case 0x03000000:
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case 0x03000000:
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@ -1541,7 +1541,7 @@ void ARM7Write32(u32 addr, u32 val)
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{
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{
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case 0x02000000:
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case 0x02000000:
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case 0x02800000:
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case 0x02800000:
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*(u32*)&MainRAM[addr & 0x3FFFFF] = val;
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*(u32*)&MainRAM[addr & (MAIN_RAM_SIZE - 1)] = val;
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return;
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return;
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case 0x03000000:
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case 0x03000000:
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@ -1648,7 +1648,7 @@ u8 ARM9IORead8(u32 addr)
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return GPU3D::Read8(addr);
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return GPU3D::Read8(addr);
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}
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}
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printf("unknown ARM9 IO read8 %08X\n", addr);
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printf("unknown ARM9 IO read8 %08X %08X\n", addr, ARM9->R[15]);
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return 0;
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return 0;
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}
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}
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@ -1886,7 +1886,7 @@ u32 ARM9IORead32(u32 addr)
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return GPU3D::Read32(addr);
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return GPU3D::Read32(addr);
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}
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}
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printf("unknown ARM9 IO read32 %08X\n", addr);
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printf("unknown ARM9 IO read32 %08X %08X\n", addr, ARM9->R[15]);
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return 0;
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return 0;
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}
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}
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@ -1966,7 +1966,7 @@ void ARM9IOWrite8(u32 addr, u8 val)
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return;
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return;
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}
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}
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printf("unknown ARM9 IO write8 %08X %02X\n", addr, val);
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printf("unknown ARM9 IO write8 %08X %02X %08X\n", addr, val, ARM9->R[15]);
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}
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}
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void ARM9IOWrite16(u32 addr, u16 val)
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void ARM9IOWrite16(u32 addr, u16 val)
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@ -2127,7 +2127,7 @@ void ARM9IOWrite16(u32 addr, u16 val)
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return;
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return;
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}
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}
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printf("unknown ARM9 IO write16 %08X %04X %08X\n", addr, val, ARM9->R[14]);
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printf("unknown ARM9 IO write16 %08X %04X %08X\n", addr, val, ARM9->R[15]);
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}
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}
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void ARM9IOWrite32(u32 addr, u32 val)
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void ARM9IOWrite32(u32 addr, u32 val)
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@ -2280,7 +2280,7 @@ void ARM9IOWrite32(u32 addr, u32 val)
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return;
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return;
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}
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}
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printf("unknown ARM9 IO write32 %08X %08X\n", addr, val);
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printf("unknown ARM9 IO write32 %08X %08X %08X\n", addr, val, ARM9->R[15]);
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}
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}
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@ -2325,7 +2325,7 @@ u8 ARM7IORead8(u32 addr)
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return SPU::Read8(addr);
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return SPU::Read8(addr);
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}
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}
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printf("unknown ARM7 IO read8 %08X\n", addr);
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printf("unknown ARM7 IO read8 %08X %08X\n", addr, ARM7->R[15]);
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return 0;
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return 0;
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}
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}
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@ -2402,7 +2402,7 @@ u16 ARM7IORead16(u32 addr)
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return SPU::Read16(addr);
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return SPU::Read16(addr);
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}
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}
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printf("unknown ARM7 IO read16 %08X %08X\n", addr, ARM9->R[15]);
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printf("unknown ARM7 IO read16 %08X %08X\n", addr, ARM7->R[15]);
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return 0;
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return 0;
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}
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}
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@ -2488,7 +2488,7 @@ u32 ARM7IORead32(u32 addr)
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return SPU::Read32(addr);
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return SPU::Read32(addr);
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}
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}
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printf("unknown ARM7 IO read32 %08X\n", addr);
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printf("unknown ARM7 IO read32 %08X %08X\n", addr, ARM7->R[15]);
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return 0;
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return 0;
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}
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}
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@ -2560,7 +2560,7 @@ void ARM7IOWrite8(u32 addr, u8 val)
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return;
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return;
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}
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}
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printf("unknown ARM7 IO write8 %08X %02X\n", addr, val);
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printf("unknown ARM7 IO write8 %08X %02X %08X\n", addr, val, ARM7->R[15]);
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}
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}
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void ARM7IOWrite16(u32 addr, u16 val)
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void ARM7IOWrite16(u32 addr, u16 val)
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@ -2681,7 +2681,7 @@ void ARM7IOWrite16(u32 addr, u16 val)
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return;
|
return;
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}
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}
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printf("unknown ARM7 IO write16 %08X %04X\n", addr, val);
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printf("unknown ARM7 IO write16 %08X %04X %08X\n", addr, val, ARM7->R[15]);
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}
|
}
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void ARM7IOWrite32(u32 addr, u32 val)
|
void ARM7IOWrite32(u32 addr, u32 val)
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@ -2783,7 +2783,7 @@ void ARM7IOWrite32(u32 addr, u32 val)
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return;
|
return;
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}
|
}
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printf("unknown ARM7 IO write32 %08X %08X\n", addr, val);
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printf("unknown ARM7 IO write32 %08X %08X %08X\n", addr, val, ARM7->R[15]);
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}
|
}
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||||||
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|
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}
|
}
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|
|
@ -102,7 +102,9 @@ extern u8 ROMSeed1[2*8];
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||||||
extern u8 ARM9BIOS[0x1000];
|
extern u8 ARM9BIOS[0x1000];
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||||||
extern u8 ARM7BIOS[0x4000];
|
extern u8 ARM7BIOS[0x4000];
|
||||||
|
|
||||||
extern u8 MainRAM[0x400000];
|
#define MAIN_RAM_SIZE 0x400000
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||||||
|
|
||||||
|
extern u8 MainRAM[MAIN_RAM_SIZE];
|
||||||
|
|
||||||
bool Init();
|
bool Init();
|
||||||
void DeInit();
|
void DeInit();
|
||||||
|
|
Loading…
Reference in New Issue