move RX-finish to its own function. more accurate filtering. implement RXFILTER.
This commit is contained in:
Arisotura
parent
fc4beabab2
commit
f8b20a0920
360
src/Wifi.cpp
360
src/Wifi.cpp
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@ -439,7 +439,7 @@ void PowerDown()
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}
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bool MACEqual(u8* a, u8* b)
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bool MACEqual(const u8* a, const u8* b)
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{
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return (*(u32*)&a[0] == *(u32*)&b[0]) && (*(u16*)&a[4] == *(u16*)&b[4]);
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}
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@ -540,8 +540,8 @@ void StartTX_Beacon()
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// TODO eventually: there is a small delay to firing TX
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void FireTX()
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{
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if (!(IOPORT(W_RXCnt) & 0x8000))
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return;
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//if (!(IOPORT(W_RXCnt) & 0x8000))
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// return;
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u16 txbusy = IOPORT(W_TXBusy);
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@ -1059,41 +1059,263 @@ void StartRX()
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ComStatus |= 1;
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}
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/*void FinishRX()
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void FinishRX()
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{
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u16 addr = IOPORT(W_RXTXAddr) << 1;
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if (addr & 0x2) IncrementRXAddr(addr);
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// copy the RX header
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u16 headeraddr = IOPORT(W_RXBufWriteCursor) << 1;
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[0]; IncrementRXAddr(headeraddr);
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[2]; IncrementRXAddr(headeraddr, 4);
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[6]; IncrementRXAddr(headeraddr);
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[8]; IncrementRXAddr(headeraddr);
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[10];
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IOPORT(W_RXBufWriteCursor) = (addr & ~0x3) >> 1;
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SetIRQ(0);
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SetStatus(1);
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//printf("%016llX: finished receiving a frame, aid=%04X, FC=%04X, client=%04X\n", USTimestamp, IOPORT(W_AIDLow), *(u16*)&RXBuffer[0xC], *(u16*)&RXBuffer[0xC + 26]);
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WIFI_LOG("wifi: finished receiving packet %04X\n", *(u16*)&RXBuffer[12]);
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LocalMP::_logstring2(USTimestamp, "FINISH RX", ((IOPORT(W_AIDLow))<<16)|(*(u16*)&RXBuffer[12+26]), RXTimestamp);
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ComStatus &= ~0x1;
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RXCounter = 0;
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if ((RXBuffer[0] & 0x0F) == 0x0C)
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{bidon=USTimestamp-bazar;bazar=USTimestamp;
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if (!ComStatus)
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{
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if (IOPORT(W_PowerState) & 0x0300)
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SetStatus(9);
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else
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SetStatus(1);
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}
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// TODO: RX stats
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u16 framectl = *(u16*)&RXBuffer[12];
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// check the frame's destination address
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// note: the hardware always checks the first address field, regardless of the frame type/etc
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// similarly, the second address field is used to send acks to non-broadcast frames
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u8* dstmac = &RXBuffer[12 + 4];
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if (!(dstmac[0] & 0x01))
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{
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if (!MACEqual(dstmac, (u8*)&IOPORT(W_MACAddr0)))
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return;
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}
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// apply RX filtering
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// TODO:
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// * RXFILTER bits 0, 9, 10, 12 not fully understood
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// * port 0D8 also affects reception of frames
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// * MP CMD frames with a duplicate sequence number are ignored
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u16 rxflags = 0x0010;
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switch ((framectl >> 2) & 0x3)
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{
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case 0: // management
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{
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u8* bssid = &RXBuffer[12 + 16];
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if (MACEqual(bssid, (u8*)&IOPORT(W_BSSID0)))
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rxflags |= 0x8000;
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u16 subtype = (framectl >> 4) & 0xF;
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if (subtype == 0x8) // beacon
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{
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if (!(rxflags & 0x8000))
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{
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if (!(IOPORT(W_RXFilter) & (1<<0)))
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return;
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}
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rxflags |= 0x0001;
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}
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else if ((subtype <= 0x5) ||
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(subtype >= 0xA && subtype <= 0xC))
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{
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if (!(rxflags & 0x8000))
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{
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// CHECKME!
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if (!(IOPORT(W_RXFilter) & (3<<9)))
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return;
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}
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}
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}
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break;
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case 1: // control
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{
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if ((framectl & 0xF0) == 0xA0) // PS-poll
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{
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u8* bssid = &RXBuffer[12 + 4];
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if (MACEqual(bssid, (u8*)&IOPORT(W_BSSID0)))
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rxflags |= 0x8000;
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if (!(rxflags & 0x8000))
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{
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if (!(IOPORT(W_RXFilter) & (1<<11)))
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return;
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}
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rxflags |= 0x0005;
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}
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else
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return;
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}
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break;
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case 2: // data
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{
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u16 fromto = (framectl >> 8) & 0x3;
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if (IOPORT(W_RXFilter2) & (1<<fromto))
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return;
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int bssidoffset[4] = {16, 4, 10, 0};
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if (bssidoffset[fromto])
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{
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u8* bssid = &RXBuffer[12 + bssidoffset[fromto]];
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if (MACEqual(bssid, (u8*)&IOPORT(W_BSSID0)))
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rxflags |= 0x8000;
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}
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u16 rxfilter = IOPORT(W_RXFilter);
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if (!(rxflags & 0x8000))
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{
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if (!(rxfilter & (1<<11)))
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return;
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}
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if (framectl & (1<<11)) // retransmit
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{
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if (!(rxfilter & (1<<0)))
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return;
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}
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// check for MP frames
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// the hardware simply checks for these specific MAC addresses
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// the reply check has priority over the other checks
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// TODO: it seems to be impossible to receive a MP reply outside of a CMD transfer's reply timeframe
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// if the framectl subtype field is 1 or 5
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// maybe one of the unknown registers controls that?
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// maybe it is impossible to receive CF-Ack frames outside of a CF-Poll period?
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// TODO: GBAtek says frame type F is for all empty packets?
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// my hardware tests say otherwise
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if (MACEqual(&RXBuffer[12 + 16], MPReplyMAC))
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{
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if ((framectl & 0xF0) == 0x50)
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rxflags |= 0x000F;
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else
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rxflags |= 0x000E;
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}
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else if (MACEqual(&RXBuffer[12 + 4], MPCmdMAC))
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{
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rxflags |= 0x000C;
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}
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else if (MACEqual(&RXBuffer[12 + 4], MPAckMAC))
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{
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rxflags |= 0x000D;
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}
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else
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{
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rxflags |= 0x0008;
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}
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switch ((framectl >> 4) & 0xF)
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{
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case 0x0: break;
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case 0x1:
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if ((rxflags & 0xF) == 0xD)
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{
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if (!(rxfilter & (1<<7))) return;
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}
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else if ((rxflags & 0xF) != 0xE)
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{
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if (!(rxfilter & (1<<1))) return;
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}
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break;
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case 0x2:
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if ((rxflags & 0xF) != 0xC)
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{
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if (!(rxfilter & (1<<2))) return;
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}
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break;
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case 0x3:
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if (!(rxfilter & (1<<3))) return;
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break;
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case 0x4: break;
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case 0x5:
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if ((rxflags & 0xF) == 0xF)
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{
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if (!(rxfilter & (1<<8))) return;
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}
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else
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{
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if (!(rxfilter & (1<<4))) return;
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}
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break;
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case 0x6:
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if (!(rxfilter & (1<<5))) return;
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break;
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case 0x7:
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if (!(rxfilter & (1<<6))) return;
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break;
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default:
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return;
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}
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}
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break;
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}
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// build the RX header
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u16 headeraddr = IOPORT(W_RXBufWriteCursor) << 1; u16 zorp = headeraddr;
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*(u16*)&RAM[headeraddr] = rxflags;
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IncrementRXAddr(headeraddr);
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*(u16*)&RAM[headeraddr] = 0x0040; // ???
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IncrementRXAddr(headeraddr, 4);
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[6]; // TX rate
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IncrementRXAddr(headeraddr);
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[8]; // frame length
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IncrementRXAddr(headeraddr);
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*(u16*)&RAM[headeraddr] = 0x4080; // RSSI
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// signal successful reception
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u16 addr = IOPORT(W_RXTXAddr) << 1;
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if (addr & 0x2) IncrementRXAddr(addr);
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IOPORT(W_RXBufWriteCursor) = (addr & ~0x3) >> 1;
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SetIRQ(0);
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if ((rxflags & 0x800F) == 0x800C)
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{
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// reply to CMD frames
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u16 clientmask = *(u16*)&RXBuffer[0xC + 26];
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//printf("RECEIVED REPLY!!! CLIENT=%04X AID=%04X\n", clientmask, IOPORT(W_AIDLow));
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if (IOPORT(W_AIDLow) && (RXBuffer[0xC + 4] & 0x01) && (clientmask & (1 << IOPORT(W_AIDLow))))
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{//printf("%016llX: sending MP reply\n", USTimestamp);
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LocalMP::_logstring(USTimestamp, "SENDING MP REPLY");
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if (IOPORT(W_AIDLow) && (clientmask & (1 << IOPORT(W_AIDLow))))
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{
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SendMPReply(*(u16*)&RXBuffer[0xC + 24], clientmask);
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}
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else
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{
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// send a blank
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// this is just so the host can have something to receive, instead of hitting a timeout
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// in the case this client wasn't ready to send a reply
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// TODO: also send this if we have RX disabled
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Platform::MP_SendReply(nullptr, 0, USTimestamp, 0);
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}
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}*/
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}
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else if ((rxflags & 0x800F) == 0x8001)
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{
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// when receiving a beacon with the right BSSID, the beacon's timestamp
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// is copied to USCOUNTER
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u32 len = *(u16*)&RXBuffer[8];
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u16 txrate = *(u16*)&RXBuffer[6];
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len *= ((txrate==0x14) ? 4 : 8);
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len -= 76; // CHECKME: is this offset fixed?
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u64 timestamp = *(u64*)&RXBuffer[12 + 24];
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timestamp += (u64)len;
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USCounter = timestamp;
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}
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}
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void MPClientReplyRX(int client)
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{
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@ -1482,8 +1704,8 @@ void USTimer(u32 us)
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if (beaconus == IOPORT(W_PreBeacon)) SetIRQ15();
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}
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//if (!uspart) MSTimer();
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if (uspart < old_uspart) MSTimer();
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if (!uspart) MSTimer();
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//if (uspart < old_uspart) MSTimer();
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}
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if (IOPORT(W_CmdCountCnt) & 0x0001)
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@ -1532,8 +1754,8 @@ void USTimer(u32 us)
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{
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u32 old_rxc = RXCounter & 0x1FF;
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RXCounter += us;
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//if ((!(RXCounter & 0x1FF)))
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if ((RXCounter & 0x1FF) < old_rxc)
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if ((!(RXCounter & 0x1FF)))
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//if ((RXCounter & 0x1FF) < old_rxc)
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{
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CheckRX(0);
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}
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@ -1576,77 +1798,21 @@ void USTimer(u32 us)
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{
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u32 old_rxt = RXTime & RXHalfwordTimeMask;
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RXTime -= us;
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//if (!(RXTime & RXHalfwordTimeMask))
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if ((RXTime & RXHalfwordTimeMask) < old_rxt)
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if (!(RXTime & RXHalfwordTimeMask))
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//if ((RXTime & RXHalfwordTimeMask) < old_rxt)
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{
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u16 addr = IOPORT(W_RXTXAddr) << 1;
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if (addr < 0x1FFF) *(u16*)&RAM[addr] = *(u16*)&RXBuffer[RXBufferPtr];
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IncrementRXAddr(addr);
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IOPORT(W_RXTXAddr) = addr >> 1;
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RXBufferPtr += 2;
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if (RXTime == 0) // finished receiving
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{
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if (addr & 0x2) IncrementRXAddr(addr);
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// copy the RX header
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u16 headeraddr = IOPORT(W_RXBufWriteCursor) << 1;
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[0]; IncrementRXAddr(headeraddr);
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[2]; IncrementRXAddr(headeraddr, 4);
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[6]; IncrementRXAddr(headeraddr);
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[8]; IncrementRXAddr(headeraddr);
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*(u16*)&RAM[headeraddr] = *(u16*)&RXBuffer[10];
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IOPORT(W_RXBufWriteCursor) = (addr & ~0x3) >> 1;
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SetIRQ(0);
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SetStatus(1);
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WIFI_LOG("wifi: finished receiving packet %04X\n", *(u16*)&RXBuffer[12]);
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ComStatus &= ~0x1;
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RXCounter = 0;
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if ((RXBuffer[0] & 0x0F) == 0x0C)
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{
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u16 clientmask = *(u16*)&RXBuffer[0xC + 26];
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if (IOPORT(W_AIDLow) && (RXBuffer[0xC + 4] & 0x01) && (clientmask & (1 << IOPORT(W_AIDLow))))
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{
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SendMPReply(*(u16*)&RXBuffer[0xC + 24], clientmask);
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FinishRX();
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}
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else
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{
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// send a blank
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// this is just so the host can have something to receive, instead of hitting a timeout
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// in the case this client wasn't ready to send a reply
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// TODO: also send this if we have RX disabled
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Platform::MP_SendReply(nullptr, 0, USTimestamp, 0);
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}
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}
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else if ((*(u16*)&RXBuffer[0] & 0x800F) == 0x8001)
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{
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// when receiving a beacon with the right BSSID, the beacon's timestamp
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// is copied to USCOUNTER
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u32 len = *(u16*)&RXBuffer[8];
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u16 txrate = *(u16*)&RXBuffer[6];
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len *= ((txrate==0x14) ? 4 : 8);
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len -= 76; // CHECKME: is this offset fixed?
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u64 timestamp = *(u64*)&RXBuffer[12 + 24];
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timestamp += (u64)len;
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USCounter = timestamp;
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}
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if ((!ComStatus) && (IOPORT(W_PowerState) & 0x0300))
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{
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SetStatus(9);
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}
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}
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if (addr == (IOPORT(W_RXBufReadCursor) << 1))
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else if (addr == (IOPORT(W_RXBufReadCursor) << 1))
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{
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printf("wifi: RX buffer full\n");
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RXTime = 0;
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@ -1662,8 +1828,6 @@ void USTimer(u32 us)
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SetStatus(9);
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}
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}
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IOPORT(W_RXTXAddr) = addr >> 1;
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}
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}
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@ -2039,7 +2203,7 @@ void Write(u32 addr, u16 val)
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}
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if (val & 0x8000)
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{
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FireTX();
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//FireTX();
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}
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val &= 0xFF0E;
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if (val & 0x7FFF) printf("wifi: unknown RXCNT bits set %04X\n", val);
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