fix branches being able to break the queue system
fixes bw2
This commit is contained in:
parent
7a4234dcd8
commit
f823a92020
22
src/ARM.cpp
22
src/ARM.cpp
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@ -331,7 +331,7 @@ void ARMv5::JumpTo(u32 addr, bool restorecpsr, u8 R15)
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{
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//printf("JUMP! %08X %i %i\n", addr, restorecpsr, R15);
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NDS.MonitorARM9Jump(addr);
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BranchRestore = restorecpsr;
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BranchUpdate = R15;
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BranchAddr = addr;
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@ -382,15 +382,13 @@ void ARMv5::JumpTo_2()
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// doesn't matter if we put garbage in the MSbs there
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if (BranchAddr & 0x2)
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{
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DelayedQueue = &ARMv5::JumpTo_3A;
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CodeRead32(BranchAddr-2);
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QueueFunction(&ARMv5::JumpTo_3A);
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}
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else
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{
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DelayedQueue = &ARMv5::JumpTo_3B;
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CodeRead32(BranchAddr);
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QueueFunction(&ARMv5::JumpTo_3B);
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}
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}
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else
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@ -399,19 +397,17 @@ void ARMv5::JumpTo_2()
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R[15] = BranchAddr+4;
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CPSR &= ~0x20;
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DelayedQueue = &ARMv5::JumpTo_3C;
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CodeRead32(BranchAddr);
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QueueFunction(&ARMv5::JumpTo_3C);
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}
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}
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void ARMv5::JumpTo_3A()
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{
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NextInstr[0] = RetVal >> 16;
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DelayedQueue = &ARMv5::JumpTo_4;
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CodeRead32(BranchAddr+2);
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QueueFunction(&ARMv5::JumpTo_4);
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}
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void ARMv5::JumpTo_3B()
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@ -423,9 +419,8 @@ void ARMv5::JumpTo_3B()
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void ARMv5::JumpTo_3C()
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{
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NextInstr[0] = RetVal;
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DelayedQueue = &ARMv5::JumpTo_4;
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CodeRead32(BranchAddr+4);
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QueueFunction(&ARMv5::JumpTo_4);
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}
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void ARMv5::JumpTo_4()
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@ -1377,12 +1372,13 @@ void ARMv5::CodeFetch()
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if (NDS.ARM9Timestamp < TimestampMemory) NDS.ARM9Timestamp = TimestampMemory;
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Store = false;
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DataRegion = Mem9_Null;
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QueueFunction(&ARMv5::AddExecute);
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}
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else
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{
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DelayedQueue = &ARMv5::AddExecute;
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CodeRead32(PC);
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}
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QueueFunction(&ARMv5::AddExecute);
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}
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void ARMv5::AddExecute()
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@ -839,7 +839,7 @@ public:
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u64 ITCMTimestamp;
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u64 TimestampMemory;
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void (ARMv5::*FuncQueue[32])(void);
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void (ARMv5::*DelayedQueue)(void);
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void (ARMv5::*DelayedQueue)(void); // adding more than one new entry to the queue while it's already active does not work. so uh. we use this to work around that. it's less than ideal...
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u32 PC;
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bool NullFetch;
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bool Store;
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@ -443,6 +443,7 @@ bool ARMv5::ICacheLookup(const u32 addr)
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Store = false;
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RetVal = cacheLine[(addr & (ICACHE_LINELENGTH -1)) / 4];
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QueueFunction(DelayedQueue);
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return true;
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}
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}
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@ -554,6 +555,7 @@ void ARMv5::ICacheLookup_2()
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}
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Store = false;
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DataRegion = Mem9_Null;
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QueueFunction(DelayedQueue);
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}
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void ARMv5::ICacheInvalidateByAddr(const u32 addr)
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@ -2181,6 +2183,7 @@ void ARMv5::CodeRead32(u32 addr)
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DataRegion = Mem9_Null;
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Store = false;
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RetVal = ((u64)1<<63);
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QueueFunction(DelayedQueue);
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return;
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}
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@ -2192,6 +2195,7 @@ void ARMv5::CodeRead32(u32 addr)
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DataRegion = Mem9_Null;
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Store = false;
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RetVal = *(u32*)&ITCM[addr & (ITCMPhysicalSize - 1)];
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QueueFunction(DelayedQueue);
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return;
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}
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@ -2253,6 +2257,7 @@ void ARMv5::CodeRead32_2()
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Store = false;
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DataRegion = Mem9_Null;
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QueueFunction(DelayedQueue);
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return;
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}
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