parent
ebb63dcdb2
commit
e783e778eb
36
src/CP15.cpp
36
src/CP15.cpp
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@ -330,8 +330,6 @@ void ARMv5::UpdateRegionTimings(u32 addrstart, u32 addrend)
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{
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u8* bustimings = NDS.ARM9MemTimings[i];
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// checkme: should these be (bus timings shifted) - 1 or ((bustimings - 1) shifted) + 1
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// should the last cycle be halved...?
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if (NDS.ARM9ClockShift == 1)
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{
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MemTimings[i][0] = (bustimings[0] << NDS.ARM9ClockShift) - 1;
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@ -2053,13 +2051,13 @@ bool ARMv5::DataRead8(u32 addr, u32* val)
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if (PU_Map[addr>>12] & 0x30)
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WriteBufferDrain();
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NDS.ARM9Timestamp = NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataCycles = MemTimings[addr >> 14][0];
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if ((addr >> 24) == 0x02)
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{
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
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if (NDS.ARM9ClockShift == 2) DataCycles -= 4;
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DataRegion = Mem9_MainRAM;
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@ -2130,13 +2128,13 @@ bool ARMv5::DataRead16(u32 addr, u32* val)
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if (PU_Map[addr>>12] & 0x30)
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WriteBufferDrain();
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NDS.ARM9Timestamp = NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataCycles = MemTimings[addr >> 14][0];
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if ((addr >> 24) == 0x02)
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{
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
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if (NDS.ARM9ClockShift == 2) DataCycles -= 4;
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DataRegion = Mem9_MainRAM;
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@ -2207,13 +2205,13 @@ bool ARMv5::DataRead32(u32 addr, u32* val)
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if (PU_Map[addr>>12] & 0x30)
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WriteBufferDrain();
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NDS.ARM9Timestamp = NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataCycles = MemTimings[addr >> 14][1];
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if ((addr >> 24) == 0x02)
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{
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
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if (NDS.ARM9ClockShift == 2) DataCycles -= 4;
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DataRegion = Mem9_MainRAM;
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@ -2285,11 +2283,11 @@ bool ARMv5::DataRead32S(u32 addr, u32* val)
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if (addr & 0x3FF) DataCycles = MemTimings[addr >> 12][2]; //s
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else DataCycles = MemTimings[addr >> 12][1]; // ns
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DataCycles += (((NDS.ARM9Timestamp + DataCycles) + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1))) - (NDS.ARM9Timestamp + DataCycles);
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DataCycles += (((NDS.ARM9Timestamp + DataCycles) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)) - (NDS.ARM9Timestamp + DataCycles);
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if ((addr >> 24) == 0x02)
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{
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if ((NDS.ARM9Timestamp + DataCycles) < MainRAMTimestamp) DataCycles = (MainRAMTimestamp - NDS.ARM9Timestamp) + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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if ((NDS.ARM9Timestamp + DataCycles) < MainRAMTimestamp) DataCycles = ((MainRAMTimestamp - NDS.ARM9Timestamp) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
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if (NDS.ARM9ClockShift == 2) DataCycles -= 4;
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DataRegion = Mem9_MainRAM;
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@ -2359,13 +2357,13 @@ bool ARMv5::DataWrite8(u32 addr, u8 val)
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if (!(PU_Map[addr>>12] & (0x30)))
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{
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NDS.ARM9Timestamp = NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataCycles = MemTimings[addr >> 14][0];
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if ((addr >> 24) == 0x02)
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{
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataRegion = Mem9_MainRAM;
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MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
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DataCycles -= (2<<NDS.ARM9ClockShift);
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@ -2453,13 +2451,13 @@ bool ARMv5::DataWrite16(u32 addr, u16 val)
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if (!(PU_Map[addr>>12] & 0x30))
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{
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NDS.ARM9Timestamp = NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataCycles = MemTimings[addr >> 14][0];
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if ((addr >> 24) == 0x02)
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{
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataRegion = Mem9_MainRAM;
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MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
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DataCycles -= (2<<NDS.ARM9ClockShift);
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@ -2548,13 +2546,13 @@ bool ARMv5::DataWrite32(u32 addr, u32 val)
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if (!(PU_Map[addr>>12] & 0x30))
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{
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NDS.ARM9Timestamp = NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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NDS.ARM9Timestamp = (NDS.ARM9Timestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataCycles = MemTimings[addr >> 14][1];
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if ((addr >> 24) == 0x02)
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{
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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DataRegion = Mem9_MainRAM;
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MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
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DataCycles -= (2<<NDS.ARM9ClockShift);
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@ -2635,7 +2633,7 @@ bool ARMv5::DataWrite32S(u32 addr, u32 val)
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if (!(PU_Map[addr>>12] & 0x30))
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{
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DataCycles += (((NDS.ARM9Timestamp + DataCycles) + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1))) - (NDS.ARM9Timestamp + DataCycles);
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DataCycles += (((NDS.ARM9Timestamp + DataCycles) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)) - (NDS.ARM9Timestamp + DataCycles);
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// bursts cannot cross a 1kb boundary
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// CHECKME: should this cause a "barrier" for how early a code fetch can occur?
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@ -2644,7 +2642,7 @@ bool ARMv5::DataWrite32S(u32 addr, u32 val)
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if ((addr >> 24) == 0x02)
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{
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if ((NDS.ARM9Timestamp + DataCycles) < MainRAMTimestamp) DataCycles = (MainRAMTimestamp - NDS.ARM9Timestamp) + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
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if ((NDS.ARM9Timestamp + DataCycles) < MainRAMTimestamp) DataCycles = ((MainRAMTimestamp - NDS.ARM9Timestamp) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
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MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
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DataCycles -= 3 << NDS.ARM9ClockShift; // checkme: are sequentials actually - 3?
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DataRegion = Mem9_MainRAM;
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@ -2664,7 +2662,7 @@ bool ARMv5::DataWrite32S(u32 addr, u32 val)
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if ((addr >> 24) == 0x02)
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{
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cycles = (cycles - 3) | 0x80;
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cycles = (cycles - 2) | 0x80;
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}
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WriteBufferWrite(val, 2, cycles, addr);
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