jit: fix BLX_reg with rn=lr
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@ -187,9 +187,10 @@ void Compiler::A_Comp_BranchImm()
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void Compiler::A_Comp_BranchXchangeReg()
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{
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OpArg rn = MapReg(CurInstr.A_Reg(0));
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MOV(32, R(RSCRATCH), rn);
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if ((CurInstr.Instr & 0xF0) == 0x30) // BLX_reg
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MOV(32, MapReg(14), Imm32(R15 - 4));
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Comp_JumpTo(rn.GetSimpleReg());
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Comp_JumpTo(RSCRATCH);
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}
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void Compiler::T_Comp_BCOND()
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@ -359,10 +359,7 @@ Info Decode(bool thumb, u32 num, u32 instr)
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}
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if (data & A_Link)
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{
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res.DstRegs |= 1 << 14;
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res.SrcRegs |= 1 << 15;
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}
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if (res.Kind == ak_LDM)
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res.DstRegs |= instr & (1 << 15); // this is right
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