diff --git a/src/CP15.cpp b/src/CP15.cpp
index 538c66a4..0f8d180f 100644
--- a/src/CP15.cpp
+++ b/src/CP15.cpp
@@ -2102,13 +2102,9 @@ void ARMv5::CodeRead32(u32 addr)
 
     if ((addr >> 24) == 0x02)
     {
-        if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1) & ~((1<<NDS.ARM9ClockShift)-1);
-        NDS.ARM9Timestamp += cycles;
-        if (NDS.ARM9ClockShift == 2)
-        {
-            MainRAMTimestamp = NDS.ARM9Timestamp;
-            NDS.ARM9Timestamp -= 4;
-        }
+        FetchAddr[16] = addr;
+        MRTrack.Type = MainRAMType::Fetch;
+        MRTrack.Var = MRCodeFetch | MR32;
     }
     else
     {
@@ -2117,16 +2113,15 @@ void ARMv5::CodeRead32(u32 addr)
             NDS.ARM9Timestamp += 1<<NDS.ARM9ClockShift;
 
         NDS.ARM9Timestamp += cycles;
+
+        if (WBTimestamp < ((NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+            WBTimestamp = (NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+
+        RetVal = BusRead32(addr);
     }
+
     Store = false;
-
-    if (WBTimestamp < ((NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
-        WBTimestamp = (NDS.ARM9Timestamp - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-
-    if (NDS.ARM9Timestamp < TimestampActual) NDS.ARM9Timestamp = TimestampActual;
-
     DataRegion = Mem9_Null;
-    RetVal = BusRead32(addr);
     return;
 }
 
@@ -2236,21 +2231,20 @@ void ARMv5::DRead8_2()
 
     if ((addr >> 24) == 0x02)
     {
-        if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-        MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
-        if (NDS.ARM9ClockShift == 2) DataCycles -= 4;
-        DataRegion = Mem9_MainRAM;
+        MRTrack.Type = MainRAMType::Fetch;
+        MRTrack.Var = MR8;
+        MRTrack.Progress = reg;
     }
     else
     {
         DataRegion = NDS.ARM9Regions[addr>>14];
         if ((NDS.ARM9Timestamp <= WBReleaseTS) && (DataRegion == WBLastRegion)) // check write buffer
             NDS.ARM9Timestamp += 1<<NDS.ARM9ClockShift;
-    }
     
-    if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
-        WBTimestamp = (NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-    *val = BusRead8(addr);
+        if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+            WBTimestamp = (NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+        *val = BusRead8(addr);
+    }
 }
 
 bool ARMv5::DataRead16(u32 addr, u8 reg)
@@ -2334,21 +2328,20 @@ void ARMv5::DRead16_2()
 
     if ((addr >> 24) == 0x02)
     {
-        if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-        MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
-        if (NDS.ARM9ClockShift == 2) DataCycles -= 4;
-        DataRegion = Mem9_MainRAM;
+        MRTrack.Type = MainRAMType::Fetch;
+        MRTrack.Var = MR16;
+        MRTrack.Progress = reg;
     }
     else
     {
         DataRegion = NDS.ARM9Regions[addr>>14];
         if ((NDS.ARM9Timestamp <= WBReleaseTS) && (DataRegion == WBLastRegion)) // check write buffer
             NDS.ARM9Timestamp += 1<<NDS.ARM9ClockShift;
-    }
     
-    if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
-        WBTimestamp = (NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-    *val = BusRead16(addr);
+        if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+            WBTimestamp = (NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+        *val = BusRead16(addr);
+    }
 }
 
 bool ARMv5::DataRead32(u32 addr, u8 reg)
@@ -2435,21 +2428,20 @@ void ARMv5::DRead32_2()
 
     if ((addr >> 24) == 0x02)
     {
-        if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-        MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
-        if (NDS.ARM9ClockShift == 2) DataCycles -= 4;
-        DataRegion = Mem9_MainRAM;
+        MRTrack.Type = MainRAMType::Fetch;
+        MRTrack.Var = MR32;
+        MRTrack.Progress = reg;
     }
     else
     {
         DataRegion = NDS.ARM9Regions[addr>>14];
         if ((NDS.ARM9Timestamp <= WBReleaseTS) && (DataRegion == WBLastRegion)) // check write buffer
             NDS.ARM9Timestamp += 1<<NDS.ARM9ClockShift;
-    }
     
-    if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
-        WBTimestamp = (NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-    *val = BusRead32(addr);
+        if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+            WBTimestamp = (NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+        *val = BusRead32(addr);
+    }
     LDRRegs &= ~1<<reg;
 }
 
@@ -2533,15 +2525,19 @@ void ARMv5::DRead32S_2()
 
         if ((addr >> 24) == 0x02)
         {
-            MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
-            if (NDS.ARM9ClockShift == 2) MainRAMTimestamp += 4;
-            DataRegion = Mem9_MainRAM;
+            MRTrack.Type = MainRAMType::Fetch;
+            MRTrack.Var = MR32 | MRSequential;
+            MRTrack.Progress = reg;
         }
         else
         {
             DataRegion = NDS.ARM9Regions[addr>>14];
             if ((NDS.ARM9Timestamp <= WBReleaseTS) && (DataRegion == WBLastRegion)) // check write buffer
                 NDS.ARM9Timestamp += 1<<NDS.ARM9ClockShift;
+    
+            if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+                WBTimestamp = (NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+            *val = BusRead32(addr);
         }
     }
     else // ns
@@ -2552,22 +2548,21 @@ void ARMv5::DRead32S_2()
 
         if ((addr >> 24) == 0x02)
         {
-            if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-            MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
-            if (NDS.ARM9ClockShift == 2) DataCycles -= 4;
-            DataRegion = Mem9_MainRAM;
+            MRTrack.Type = MainRAMType::Fetch;
+            MRTrack.Var = MR32;
+            MRTrack.Progress = reg;
         }
         else
         {
             DataRegion = NDS.ARM9Regions[addr>>14];
             if ((NDS.ARM9Timestamp <= WBReleaseTS) && (DataRegion == WBLastRegion)) // check write buffer
                 NDS.ARM9Timestamp += 1<<NDS.ARM9ClockShift;
+    
+            if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+                WBTimestamp = (NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+            *val = BusRead32(addr);
         }
     }
-    
-    if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
-        WBTimestamp = (NDS.ARM9Timestamp + DataCycles - (3<<NDS.ARM9ClockShift) + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-    *val = BusRead32(addr);
     LDRRegs &= ~1<<reg;
 }
 
@@ -2652,16 +2647,18 @@ void ARMv5::DWrite8_2()
 
         if ((addr >> 24) == 0x02)
         {
-            if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-            DataRegion = Mem9_MainRAM;
-            MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
-            DataCycles -= 1<<NDS.ARM9ClockShift;
+            MRTrack.Type = MainRAMType::Fetch;
+            MRTrack.Var = MRWrite | MR8;
+            MRTrack.Progress = reg;
         }
-        else DataRegion = NDS.ARM9Regions[addr>>14];
+        else
+        {
+            DataRegion = NDS.ARM9Regions[addr>>14];
         
-        if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
-            WBTimestamp = (NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-        BusWrite8(addr, val);
+            if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+                WBTimestamp = (NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+            BusWrite8(addr, val);
+        }
     }
     else
     {
@@ -2758,16 +2755,18 @@ void ARMv5::DWrite16_2()
 
         if ((addr >> 24) == 0x02)
         {
-            if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-            DataRegion = Mem9_MainRAM;
-            MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
-            DataCycles -= 2<<NDS.ARM9ClockShift;
+            MRTrack.Type = MainRAMType::Fetch;
+            MRTrack.Var = MRWrite | MR16;
+            MRTrack.Progress = reg;
         }
-        else DataRegion = NDS.ARM9Regions[addr>>14];
+        else
+        {
+            DataRegion = NDS.ARM9Regions[addr>>14];
         
-        if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
-            WBTimestamp = (NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-        BusWrite16(addr, val);
+            if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+                WBTimestamp = (NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+            BusWrite16(addr, val);
+        }
     }
     else
     {
@@ -2869,16 +2868,18 @@ void ARMv5::DWrite32_2()
 
         if ((addr >> 24) == 0x02)
         {
-            if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-            DataRegion = Mem9_MainRAM;
-            MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
-            DataCycles -= 2<<NDS.ARM9ClockShift;
+            MRTrack.Type = MainRAMType::Fetch;
+            MRTrack.Var = MRWrite | MR32;
+            MRTrack.Progress = reg;
         }
-        else DataRegion = NDS.ARM9Regions[addr>>14];
+        else
+        {
+            DataRegion = NDS.ARM9Regions[addr>>14];
         
-        if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
-            WBTimestamp = (NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-        BusWrite32(addr, val);
+            if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+                WBTimestamp = (NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+            BusWrite32(addr, val);
+        }
     }
     else
     {
@@ -2977,11 +2978,18 @@ void ARMv5::DWrite32S_2()
 
             if ((addr >> 24) == 0x02)
             {
-                MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
-                MainRAMTimestamp += 2<<NDS.ARM9ClockShift;
-                DataRegion = Mem9_MainRAM;
+                MRTrack.Type = MainRAMType::Fetch;
+                MRTrack.Var = MRWrite | MR32 | MRSequential;
+                MRTrack.Progress = reg;
+            }
+            else
+            {
+                DataRegion = NDS.ARM9Regions[addr>>14];
+        
+                if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+                    WBTimestamp = (NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+                BusWrite32(addr, val);
             }
-            else DataRegion = NDS.ARM9Regions[addr>>14];
 
             // burst stores seem to process the extra delay cycles at the end of the burst
             // this means that we end up *always* able to begin code fetches 3 cycles early when accessing the bus
@@ -2997,17 +3005,19 @@ void ARMv5::DWrite32S_2()
 
             if ((addr >> 24) == 0x02)
             {
-                if (NDS.ARM9Timestamp < MainRAMTimestamp) NDS.ARM9Timestamp = (MainRAMTimestamp + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-                MainRAMTimestamp = NDS.ARM9Timestamp + DataCycles;
-                DataCycles -= 2<<NDS.ARM9ClockShift;
-                DataRegion = Mem9_MainRAM;
+                MRTrack.Type = MainRAMType::Fetch;
+                MRTrack.Var = MRWrite | MR32;
+                MRTrack.Progress = reg;
             }
-            else DataRegion = NDS.ARM9Regions[addr>>14];
-        }
+            else
+            {
+                DataRegion = NDS.ARM9Regions[addr>>14];
         
-        if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
-            WBTimestamp = (NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
-        BusWrite32(addr, val);
+                if (WBTimestamp < ((NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1)))
+                    WBTimestamp = (NDS.ARM9Timestamp + DataCycles + ((1<<NDS.ARM9ClockShift)-1)) & ~((1<<NDS.ARM9ClockShift)-1);
+                BusWrite32(addr, val);
+            }
+        }
     }
     else
     {
diff --git a/src/NDS.cpp b/src/NDS.cpp
index 42eac35e..ce90be62 100644
--- a/src/NDS.cpp
+++ b/src/NDS.cpp
@@ -922,6 +922,67 @@ void NDS::MainRAMHandleARM9()
             break;
         }
 
+        case MainRAMType::Fetch:
+        {
+            u8 var = ARM9.MRTrack.Var;
+
+            if ((var & MRSequential) && A9WENTLAST)
+            {
+                MainRAMTimestamp = A9ContentionTS += 2;
+                ARM9.DataCycles = 2 << ARM9ClockShift;
+            }
+            else
+            {
+                if (A9ContentionTS < MainRAMTimestamp) { A9ContentionTS = MainRAMTimestamp; if (A7PRIORITY) return; }
+
+                MainRAMTimestamp = A9ContentionTS +  (var & MR16) ? 8 : 9; // checkme: are these correct for 8bit?
+                if (var & MRWrite) A9ContentionTS += (var & MR16) ? 5 : 6; // checkme: is this correct for 133mhz?
+                else
+                {
+                    if (ARM9ClockShift == 1) A9ContentionTS += (var & MR16) ? 8 : 9;
+                    else                     A9ContentionTS += (var & MR16) ? 7 : 8;
+                    ARM9.DataCycles = 3 << ARM9ClockShift;
+                }
+                MainRAMLastAccess = A9LAST;
+            }
+            ARM9Timestamp = A9ContentionTS << ARM9ClockShift;
+
+            if (var & MRCodeFetch)
+            {
+                u32 addr = ARM9.FetchAddr[16];
+                ARM9.RetVal = ARM9Read32(addr);
+            }
+            else
+            {
+                u8 reg = ARM9.MRTrack.Progress;
+                u32 addr = ARM9.FetchAddr[reg];
+                if (var & MRWrite) // write
+                {
+                    u32 val = ARM9.STRVal[reg];
+                    if      (var & MR32) ARM9Write32(addr, val);
+                    else if (var & MR16) ARM9Write16(addr, val);
+                    else                 ARM9Write8 (addr, val);
+                }
+                else // read
+                {
+                    u32 dummy;
+                    u32* val = (ARM9.LDRFailedRegs & (1<<reg)) ? &dummy : &ARM9.R[reg];
+                    if      (var & MR32) *val = ARM9Read32(addr);
+                    else if (var & MR16) *val = ARM9Read16(addr);
+                    else                 *val = ARM9Read8 (addr);
+                }
+            }
+
+            int sub = 0;
+            if (var & MRWrite) sub = 3<<ARM9ClockShift;
+
+            u64 ts = (ARM9Timestamp - sub + ((1<<ARM9ClockShift)-1)) & ~((1<<ARM9ClockShift)-1);
+            if (ARM9.WBTimestamp < ts) ARM9.WBTimestamp = ts;
+
+            memset(&ARM9.MRTrack, 0, sizeof(ARM9.MRTrack));
+            break;
+        }
+
         case MainRAMType::ICacheStream:
         {
             u8* prog = &ARM9.MRTrack.Progress;