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Replaced more CP15 magic values with named constants

This commit is contained in:
DesperateProgrammer 2024-01-19 10:24:02 +01:00
parent 434c234098
commit d9fcc2ec2c
2 changed files with 16 additions and 11 deletions
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22
src/CP15.cpp
View File

@ -114,7 +114,7 @@ void ARMv5::UpdateDTCMSetting()
u32 newDTCMMask;
u32 newDTCMSize;
if (CP15Control & (1<<16))
if (CP15Control & CP15_TCM_CR_DTCM_ENABLE)
{
newDTCMSize = 0x200 << ((DTCMSetting >> 1) & 0x1F);
if (newDTCMSize < 0x1000) newDTCMSize = 0x1000;
@ -138,7 +138,7 @@ void ARMv5::UpdateDTCMSetting()
void ARMv5::UpdateITCMSetting()
{
if (CP15Control & (1<<18))
if (CP15Control & CP15_TCM_CR_ITCM_ENABLE)
{
ITCMSize = 0x200 << ((ITCMSetting >> 1) & 0x1F);
#ifdef JIT_ENABLED
@ -156,7 +156,7 @@ void ARMv5::UpdateITCMSetting()
// (not to the region range/enabled status)
void ARMv5::UpdatePURegion(u32 n)
{
if (!(CP15Control & (1<<0)))
if (!(CP15Control & CP15_CR_MPUENABLE))
return;
u32 coderw = (PU_CodeRW >> (4*n)) & 0xF;
@ -170,12 +170,12 @@ void ARMv5::UpdatePURegion(u32 n)
// 1/0: goes to memory and cache
// 1/1: goes to cache
if (CP15Control & (1<<12))
if (CP15Control & CP15_CACHE_CR_ICACHEENABLE)
codecache = (PU_CodeCacheable >> n) & 0x1;
else
codecache = 0;
if (CP15Control & (1<<2))
if (CP15Control & CP15_CACHE_CR_DCACHEENABLE)
{
datacache = (PU_DataCacheable >> n) & 0x1;
datawrite = (PU_DataCacheWrite >> n) & 0x1;
@ -263,13 +263,13 @@ void ARMv5::UpdatePURegion(u32 n)
void ARMv5::UpdatePURegions(bool update_all)
{
if (!(CP15Control & (1<<0)))
if (!(CP15Control & CP15_CR_MPUENABLE))
{
// PU disabled
u8 mask = 0x07;
if (CP15Control & (1<<2)) mask |= 0x30;
if (CP15Control & (1<<12)) mask |= 0x40;
if (CP15Control & CP15_CACHE_CR_DCACHEENABLE) mask |= 0x30;
if (CP15Control & CP15_CACHE_CR_ICACHEENABLE) mask |= 0x40;
memset(PU_UserMap, mask, 0x100000);
memset(PU_PrivMap, mask, 0x100000);
@ -442,9 +442,9 @@ void ARMv5::CP15Write(u32 id, u32 val)
{
UpdatePURegions((old & 0x1) != (val & 0x1));
}
if (val & (1<<7)) Log(LogLevel::Warn, "!!!! ARM9 BIG ENDIAN MODE. VERY BAD. SHIT GONNA ASPLODE NOW\n");
if (val & (1<<13)) ExceptionBase = 0xFFFF0000;
else ExceptionBase = 0x00000000;
if (val & CP15_CR_BIGENDIAN) Log(LogLevel::Warn, "!!!! ARM9 BIG ENDIAN MODE. VERY BAD. SHIT GONNA ASPLODE NOW\n");
if (val & CP15_CR_HIGHEXCEPTIONBASE) ExceptionBase = 0xFFFF0000;
else ExceptionBase = 0x00000000;
}
return;

5
src/MemConstants.h
View File

@ -45,10 +45,15 @@ constexpr u32 ICACHE_LINELENGTH = 8 * (1 << ICACHE_LINELENGTH_ENCODED);
constexpr u32 ICACHE_LINESPERSET = ICACHE_SIZE / (ICACHE_SETS * ICACHE_LINELENGTH);
constexpr u32 CP15_CR_MPUENABLE = (1 << 0);
constexpr u32 CP15_CR_BIGENDIAN = (1 << 7);
constexpr u32 CP15_CR_HIGHEXCEPTIONBASE = (1 << 13);
constexpr u32 CP15_CACHE_CR_ROUNDROBIN = (1 << 14);
constexpr u32 CP15_CACHE_CR_ICACHEENABLE = (1 << 12);
constexpr u32 CP15_CACHE_CR_DCACHEENABLE = (1 << 2);
constexpr u32 CP15_CACHE_CR_WRITEBUFFERENABLE = (1 << 3);
constexpr u32 CP15_TCM_CR_DTCM_ENABLE = (1 << 16);
constexpr u32 CP15_TCM_CR_ITCM_ENABLE = (1 << 18);
}
#endif // MELONDS_MEMCONSTANTS_H