parent
93242e1189
commit
c96b49e9cd
23
src/ARM.cpp
23
src/ARM.cpp
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@ -160,7 +160,6 @@ void ARM::Reset()
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Halted = 0;
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DataCycles = 0;
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IRQTimestamp = -1;
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IRQ = 0;
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for (int i = 0; i < 16; i++)
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@ -706,7 +705,7 @@ void ARMv5::StartExecTHUMB()
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else NullFetch = false;
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PC = R[15];
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if (!(CPSR & 0x80) && (NDS.ARM9Timestamp > IRQTimestamp)) TriggerIRQ<CPUExecuteMode::Interpreter>();
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if (IRQ && !(CPSR & 0x80)) TriggerIRQ<CPUExecuteMode::Interpreter>();
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else if (CurInstr > 0xFFFFFFFF) [[unlikely]] // handle aborted instructions
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{
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PrefetchAbort();
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@ -729,7 +728,7 @@ void ARMv5::StartExecARM()
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NullFetch = false;
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PC = R[15];
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if (!(CPSR & 0x80) && (NDS.ARM9Timestamp > IRQTimestamp)) TriggerIRQ<CPUExecuteMode::Interpreter>();
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if (IRQ && !(CPSR & 0x80)) TriggerIRQ<CPUExecuteMode::Interpreter>();
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else if (CurInstr & ((u64)1<<63)) [[unlikely]] // handle aborted instructions
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{
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PrefetchAbort();
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@ -772,13 +771,14 @@ void ARMv5::Execute()
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else if (NDS.HaltInterrupted(0))
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{
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Halted = 0;
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NDS.ARM9Timestamp = IRQTimestamp;
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#ifdef JIT_ENABLED
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if (NDS.IME[0] & 0x1)
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{
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#ifdef JIT_ENABLED
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if constexpr (mode == CPUExecuteMode::JIT) TriggerIRQ<mode>();
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}
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else
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#endif
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IRQ = 1;
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}
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}
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else
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{
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@ -921,7 +921,7 @@ void ARMv4::StartExecTHUMB()
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CodeRead16(R[15]);
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QueueFunction(&ARMv4::UpdateNextInstr1);
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if (!(CPSR & 0x80) && (NDS.ARM7Timestamp > IRQTimestamp)) TriggerIRQ<CPUExecuteMode::Interpreter>();
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if (IRQ && !(CPSR & 0x80)) TriggerIRQ<CPUExecuteMode::Interpreter>();
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else
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{
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// actually execute
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@ -939,7 +939,7 @@ void ARMv4::StartExecARM()
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CodeRead32(R[15]);
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QueueFunction(&ARMv4::UpdateNextInstr1);
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if (!(CPSR & 0x80) && (NDS.ARM7Timestamp > IRQTimestamp)) TriggerIRQ<CPUExecuteMode::Interpreter>();
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if (IRQ && !(CPSR & 0x80)) TriggerIRQ<CPUExecuteMode::Interpreter>();
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else if (CheckCondition(CurInstr >> 28)) // actually execute
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{
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u32 icode = ((CurInstr >> 4) & 0xF) | ((CurInstr >> 16) & 0xFF0);
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@ -964,16 +964,13 @@ void ARMv4::Execute()
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else if (NDS.HaltInterrupted(1))
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{
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Halted = 0;
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NDS.ARM7Timestamp = IRQTimestamp;
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if (NDS.IME[1] & 0x1)
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{
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#ifdef JIT_ENABLED
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if constexpr (mode == CPUExecuteMode::JIT) TriggerIRQ<mode>();
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else
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#endif
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}
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else
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{
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IRQTimestamp = -1;
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IRQ = 1;
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}
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}
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else
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@ -213,8 +213,6 @@ public:
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u32 StopExecution;
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};
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u64 IRQTimestamp;
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u32 CodeRegion;
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s32 CodeCycles;
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16
src/NDS.cpp
16
src/NDS.cpp
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@ -1838,7 +1838,7 @@ u32 NDS::RunFrame()
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if (!MainRAMHandle()) break;
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}
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}
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CurCPU = 2;
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RunSystem(target);
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if (CPUStop & CPUStop_Sleep)
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@ -2160,20 +2160,16 @@ void NDS::SetGBASlotTimings()
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void NDS::UpdateIRQ(u32 cpu)
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{
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ARM& arm = cpu ? (ARM&)ARM7 : (ARM&)ARM9;
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u64 curtime = ((CurCPU == 2) ? SysTimestamp : ((CurCPU == 1) ? ARM7Timestamp : ((ARM9Timestamp + ((1<<ARM9ClockShift)-1)) >> ARM9ClockShift)));
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if (!cpu) curtime <<= ARM9ClockShift;
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if (IME[cpu] & 0x1 || (arm.Halted == 1))
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if (IME[cpu] & 0x1)
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{
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//arm.IRQ = !!(IE[cpu] & IF[cpu]);
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if (IE[cpu] & IF[cpu]) { if (curtime < arm.IRQTimestamp) arm.IRQTimestamp = curtime; }
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else arm.IRQTimestamp = -1;
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if ((ConsoleType == 1) && cpu && (IE2 & IF2) && (curtime < arm.IRQTimestamp))
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arm.IRQTimestamp = curtime;
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arm.IRQ = !!(IE[cpu] & IF[cpu]);
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if ((ConsoleType == 1) && cpu)
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arm.IRQ |= !!(IE2 & IF2);
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}
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else
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{
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arm.IRQTimestamp = -1;
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arm.IRQ = 0;
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}
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}
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