decouple JIT from Config. bahahahahah
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53dfcfb18a
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c1dcd585be
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@ -22,7 +22,6 @@
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#include "DSi.h"
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#include "ARM.h"
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#include "ARMInterpreter.h"
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#include "Config.h"
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#include "AREngine.h"
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#include "ARMJIT.h"
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#include "Config.h"
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@ -215,7 +214,7 @@ void ARM::DoSavestate(Savestate* file)
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file->VarArray(R_UND, 3*sizeof(u32));
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file->Var32(&CurInstr);
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#ifdef JIT_ENABLED
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if (!file->Saving && Config::JIT_Enable)
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if (!file->Saving && NDS::EnableJIT)
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{
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// hack, the JIT doesn't really pipeline
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// but we still want JIT save states to be
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@ -25,7 +25,7 @@
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#define XXH_STATIC_LINKING_ONLY
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#include "xxhash/xxhash.h"
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#include "Config.h"
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#include "Platform.h"
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#include "ARMJIT_Internal.h"
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#include "ARMJIT_Memory.h"
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@ -57,6 +57,11 @@ namespace ARMJIT
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Compiler* JITCompiler;
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int MaxBlockSize;
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bool LiteralOptimizations;
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bool BranchOptimizations;
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bool FastMemory;
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std::unordered_map<u32, JitBlock*> JitBlocks9;
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std::unordered_map<u32, JitBlock*> JitBlocks7;
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@ -326,6 +331,16 @@ void DeInit()
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void Reset()
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{
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MaxBlockSize = Platform::GetConfigInt(Platform::JIT_MaxBlockSize);
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LiteralOptimizations = Platform::GetConfigBool(Platform::JIT_LiteralOptimizations);
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BranchOptimizations = Platform::GetConfigBool(Platform::JIT_BranchOptimizations);
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FastMemory = Platform::GetConfigBool(Platform::JIT_FastMemory);
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if (MaxBlockSize < 1)
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MaxBlockSize = 1;
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if (MaxBlockSize > 32)
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MaxBlockSize = 32;
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JitEnableWrite();
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ResetBlockCache();
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@ -574,11 +589,6 @@ void CompileBlock(ARM* cpu)
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{
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bool thumb = cpu->CPSR & 0x20;
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if (Config::JIT_MaxBlockSize < 1)
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Config::JIT_MaxBlockSize = 1;
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if (Config::JIT_MaxBlockSize > 32)
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Config::JIT_MaxBlockSize = 32;
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u32 blockAddr = cpu->R[15] - (thumb ? 2 : 4);
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u32 localAddr = LocaliseCodeAddress(cpu->Num, blockAddr);
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@ -611,24 +621,24 @@ void CompileBlock(ARM* cpu)
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map.erase(existingBlockIt);
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}
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FetchedInstr instrs[Config::JIT_MaxBlockSize];
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FetchedInstr instrs[MaxBlockSize];
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int i = 0;
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u32 r15 = cpu->R[15];
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u32 addressRanges[Config::JIT_MaxBlockSize];
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u32 addressMasks[Config::JIT_MaxBlockSize];
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memset(addressMasks, 0, Config::JIT_MaxBlockSize * sizeof(u32));
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u32 addressRanges[MaxBlockSize];
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u32 addressMasks[MaxBlockSize];
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memset(addressMasks, 0, MaxBlockSize * sizeof(u32));
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u32 numAddressRanges = 0;
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u32 numLiterals = 0;
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u32 literalLoadAddrs[Config::JIT_MaxBlockSize];
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u32 literalLoadAddrs[MaxBlockSize];
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// they are going to be hashed
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u32 literalValues[Config::JIT_MaxBlockSize];
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u32 instrValues[Config::JIT_MaxBlockSize];
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u32 literalValues[MaxBlockSize];
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u32 instrValues[MaxBlockSize];
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// due to instruction merging i might not reflect the amount of actual instructions
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u32 numInstrs = 0;
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u32 writeAddrs[Config::JIT_MaxBlockSize];
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u32 writeAddrs[MaxBlockSize];
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u32 numWriteAddrs = 0, writeAddrsTranslated = 0;
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cpu->FillPipeline();
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@ -747,7 +757,7 @@ void CompileBlock(ARM* cpu)
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instrs[i].DataRegion = cpu->DataRegion;
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u32 literalAddr;
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if (Config::JIT_LiteralOptimisations
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if (LiteralOptimizations
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&& instrs[i].Info.SpecialKind == ARMInstrInfo::special_LoadLiteral
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&& DecodeLiteral(thumb, instrs[i], literalAddr))
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{
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@ -786,7 +796,7 @@ void CompileBlock(ARM* cpu)
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JIT_DEBUGPRINT("merged BL\n");
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}
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if (instrs[i].Info.Branches() && Config::JIT_BranchOptimisations
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if (instrs[i].Info.Branches() && BranchOptimizations
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&& instrs[i].Info.Kind != (thumb ? ARMInstrInfo::tk_SVC : ARMInstrInfo::ak_SVC))
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{
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bool hasBranched = cpu->R[15] != r15;
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@ -823,7 +833,7 @@ void CompileBlock(ARM* cpu)
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JIT_DEBUGPRINT("found %s idle loop %d in block %08x\n", thumb ? "thumb" : "arm", cpu->Num, blockAddr);
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}
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}
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else if (hasBranched && !isBackJump && i + 1 < Config::JIT_MaxBlockSize)
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else if (hasBranched && !isBackJump && i + 1 < MaxBlockSize)
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{
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if (link)
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{
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@ -851,7 +861,7 @@ void CompileBlock(ARM* cpu)
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}
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}
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if (!hasBranched && cond < 0xE && i + 1 < Config::JIT_MaxBlockSize)
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if (!hasBranched && cond < 0xE && i + 1 < MaxBlockSize)
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{
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JIT_DEBUGPRINT("block lengthened by untaken branch\n");
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instrs[i].Info.EndBlock = false;
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@ -865,7 +875,7 @@ void CompileBlock(ARM* cpu)
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bool secondaryFlagReadCond = !canCompile || (instrs[i - 1].BranchFlags & (branch_FollowCondTaken | branch_FollowCondNotTaken));
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if (instrs[i - 1].Info.ReadFlags != 0 || secondaryFlagReadCond)
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FloodFillSetFlags(instrs, i - 2, !secondaryFlagReadCond ? instrs[i - 1].Info.ReadFlags : 0xF);
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} while(!instrs[i - 1].Info.EndBlock && i < Config::JIT_MaxBlockSize && !cpu->Halted && (!cpu->IRQ || (cpu->CPSR & 0x80)));
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} while(!instrs[i - 1].Info.EndBlock && i < MaxBlockSize && !cpu->Halted && (!cpu->IRQ || (cpu->CPSR & 0x80)));
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if (numLiterals)
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{
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@ -33,6 +33,11 @@ namespace ARMJIT
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typedef void (*JitBlockEntry)();
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extern int MaxBlockSize;
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extern bool LiteralOptimizations;
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extern bool BranchOptimizations;
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extern bool FastMemory;
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void Init();
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void DeInit();
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@ -119,7 +119,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
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if (size == 16)
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addressMask = ~1;
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if (Config::JIT_LiteralOptimisations && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
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if (LiteralOptimizations && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
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{
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u32 addr = R15 + op2.Imm * ((flags & memop_SubtractOffset) ? -1 : 1);
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@ -136,7 +136,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
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Comp_AddCycles_CDI();
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}
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bool addrIsStatic = Config::JIT_LiteralOptimisations
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bool addrIsStatic = LiteralOptimizations
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&& RegCache.IsLiteral(rn) && op2.IsImm && !(flags & (memop_Writeback|memop_Post));
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u32 staticAddress;
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if (addrIsStatic)
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@ -200,7 +200,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
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? ARMJIT_Memory::ClassifyAddress9(CurInstr.DataRegion)
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: ARMJIT_Memory::ClassifyAddress7(CurInstr.DataRegion);
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if (Config::JIT_FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || ARMJIT_Memory::IsFastmemCompatible(expectedTarget)))
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if (ARMJIT::FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || ARMJIT_Memory::IsFastmemCompatible(expectedTarget)))
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{
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if (rdMapped.IsImm())
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{
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@ -431,7 +431,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
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else
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Comp_AddCycles_CD();
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bool compileFastPath = Config::JIT_FastMemory
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bool compileFastPath = FastMemory
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&& !usermode && (CurInstr.Cond() < 0xE || ARMJIT_Memory::IsFastmemCompatible(expectedTarget));
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// we need to make sure that the stack stays aligned to 16 bytes
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@ -809,7 +809,7 @@ void Compiler::T_Comp_LoadPCRel()
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{
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u32 offset = (CurInstr.Instr & 0xFF) << 2;
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u32 addr = (R15 & ~0x2) + offset;
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if (!Config::JIT_LiteralOptimisations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
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if (!LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
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Comp_MemAccess(CurInstr.T_Reg(8), 15, Op2(offset), 32, 0);
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}
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@ -20,7 +20,7 @@
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#include <stdio.h>
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#include "Config.h"
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#include "ARMJIT.h"
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namespace ARMInstrInfo
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{
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@ -386,7 +386,7 @@ Info Decode(bool thumb, u32 num, u32 instr)
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{
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if (res.Kind == tk_LDR_PCREL)
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{
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if (!Config::JIT_LiteralOptimisations)
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if (!ARMJIT::LiteralOptimizations)
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res.SrcRegs |= 1 << 15;
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res.SpecialKind = special_LoadLiteral;
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}
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@ -49,14 +49,6 @@ char DSiNANDPath[1024];
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int RandomizeMAC;
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int AudioBitrate;
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#ifdef JIT_ENABLED
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int JIT_Enable = false;
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int JIT_MaxBlockSize = 32;
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int JIT_BranchOptimisations = true;
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int JIT_LiteralOptimisations = true;
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int JIT_FastMemory = true;
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#endif
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ConfigEntry ConfigFile[] =
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{
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{"ExternalBIOSEnable", 0, &ExternalBIOSEnable, 0, NULL, 0},
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@ -80,18 +72,6 @@ ConfigEntry ConfigFile[] =
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{"RandomizeMAC", 0, &RandomizeMAC, 0, NULL, 0},
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{"AudioBitrate", 0, &AudioBitrate, 0, NULL, 0},
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#ifdef JIT_ENABLED
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{"JIT_Enable", 0, &JIT_Enable, 0, NULL, 0},
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{"JIT_MaxBlockSize", 0, &JIT_MaxBlockSize, 32, NULL, 0},
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{"JIT_BranchOptimisations", 0, &JIT_BranchOptimisations, 1, NULL, 0},
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{"JIT_LiteralOptimisations", 0, &JIT_LiteralOptimisations, 1, NULL, 0},
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#ifdef __APPLE__
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{"JIT_FastMemory", 0, &JIT_FastMemory, 0, NULL, 0},
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#else
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{"JIT_FastMemory", 0, &JIT_FastMemory, 1, NULL, 0},
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#endif
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#endif
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{"", -1, NULL, 0, NULL, 0}
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};
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@ -62,14 +62,6 @@ extern char DSiNANDPath[1024];
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extern int RandomizeMAC;
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extern int AudioBitrate;
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#ifdef JIT_ENABLED
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extern int JIT_Enable;
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extern int JIT_MaxBlockSize;
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extern int JIT_BranchOptimisations;
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extern int JIT_LiteralOptimisations;
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extern int JIT_FastMemory;
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#endif
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}
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#endif // CONFIG_H
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@ -80,6 +80,8 @@ u32 ARM7Regions[0x20000];
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ARMv5* ARM9;
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ARMv4* ARM7;
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bool EnableJIT;
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u32 NumFrames;
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u32 NumLagFrames;
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bool LagFrameFlag;
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@ -477,6 +479,8 @@ void Reset()
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FILE* f;
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u32 i;
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EnableJIT = Platform::GetConfigBool(Platform::JIT_Enable);
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RunningGame = false;
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LastSysClockCycles = 0;
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@ -1103,7 +1107,7 @@ u32 RunFrame()
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u32 RunFrame()
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{
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#ifdef JIT_ENABLED
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if (Config::JIT_Enable)
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if (EnableJIT)
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return NDS::ConsoleType == 1
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? RunFrame<true, 1>()
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: RunFrame<true, 0>();
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@ -162,6 +162,7 @@ struct MemRegion
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u32 Mask;
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};
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extern bool EnableJIT;
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extern int ConsoleType;
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extern int CurCPU;
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@ -36,6 +36,12 @@ void StopEmu();
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enum ConfigEntry
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{
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JIT_Enable,
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JIT_MaxBlockSize,
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JIT_LiteralOptimizations,
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JIT_BranchOptimizations,
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JIT_FastMemory,
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DLDI_Enable,
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DLDI_ImagePath,
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DLDI_ImageSize,
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@ -133,6 +133,8 @@ int GetConfigInt(ConfigEntry entry)
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switch (entry)
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{
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case JIT_MaxBlockSize: return Config::JIT_MaxBlockSize;
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case DLDI_ImageSize: return imgsizes[Config::DLDISize];
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case DSiSD_ImageSize: return imgsizes[Config::DSiSDSize];
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@ -145,6 +147,11 @@ bool GetConfigBool(ConfigEntry entry)
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{
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switch (entry)
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{
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case JIT_Enable: return Config::JIT_Enable != 0;
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case JIT_LiteralOptimizations: return Config::JIT_LiteralOptimisations != 0;
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case JIT_BranchOptimizations: return Config::JIT_BranchOptimisations != 0;
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case JIT_FastMemory: return Config::JIT_FastMemory != 0;
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case DLDI_Enable: return Config::DLDIEnable != 0;
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case DLDI_ReadOnly: return Config::DLDIReadOnly != 0;
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case DLDI_FolderSync: return Config::DLDIFolderSync != 0;
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@ -63,6 +63,14 @@ int ShowOSD;
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int ConsoleType;
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int DirectBoot;
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#ifdef JIT_ENABLED
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int JIT_Enable = false;
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int JIT_MaxBlockSize = 32;
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int JIT_BranchOptimisations = true;
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int JIT_LiteralOptimisations = true;
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int JIT_FastMemory = true;
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#endif
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int DLDIEnable;
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char DLDISDPath[1024];
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int DLDISize;
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@ -186,6 +194,18 @@ ConfigEntry PlatformConfigFile[] =
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{"ConsoleType", 0, &ConsoleType, 0, NULL, 0},
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{"DirectBoot", 0, &DirectBoot, 1, NULL, 0},
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#ifdef JIT_ENABLED
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{"JIT_Enable", 0, &JIT_Enable, 0, NULL, 0},
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{"JIT_MaxBlockSize", 0, &JIT_MaxBlockSize, 32, NULL, 0},
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{"JIT_BranchOptimisations", 0, &JIT_BranchOptimisations, 1, NULL, 0},
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{"JIT_LiteralOptimisations", 0, &JIT_LiteralOptimisations, 1, NULL, 0},
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#ifdef __APPLE__
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{"JIT_FastMemory", 0, &JIT_FastMemory, 0, NULL, 0},
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#else
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{"JIT_FastMemory", 0, &JIT_FastMemory, 1, NULL, 0},
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#endif
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#endif
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{"DLDIEnable", 0, &DLDIEnable, 0, NULL, 0},
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{"DLDISDPath", 1, DLDISDPath, 0, "dldi.bin", 1023},
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{"DLDISize", 0, &DLDISize, 0, NULL, 0},
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@ -79,6 +79,14 @@ extern int ShowOSD;
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extern int ConsoleType;
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extern int DirectBoot;
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#ifdef JIT_ENABLED
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extern int JIT_Enable;
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extern int JIT_MaxBlockSize;
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extern int JIT_BranchOptimisations;
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extern int JIT_LiteralOptimisations;
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extern int JIT_FastMemory;
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#endif
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extern int DLDIEnable;
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extern char DLDISDPath[1024];
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extern int DLDISize;
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