decouple JIT from Config. bahahahahah

src/ARM.cpp

@@ -22,7 +22,6 @@
 #include "DSi.h"
 #include "ARM.h"
 #include "ARMInterpreter.h"
-#include "Config.h"
 #include "AREngine.h"
 #include "ARMJIT.h"
 #include "Config.h"
@@ -215,7 +214,7 @@ void ARM::DoSavestate(Savestate* file)
     file->VarArray(R_UND, 3*sizeof(u32));
     file->Var32(&CurInstr);
 #ifdef JIT_ENABLED
-    if (!file->Saving && Config::JIT_Enable)
+    if (!file->Saving && NDS::EnableJIT)
     {
         // hack, the JIT doesn't really pipeline
         // but we still want JIT save states to be

src/ARMJIT.cpp

@@ -25,7 +25,7 @@
 #define XXH_STATIC_LINKING_ONLY
 #include "xxhash/xxhash.h"
 
-#include "Config.h"
+#include "Platform.h"
 
 #include "ARMJIT_Internal.h"
 #include "ARMJIT_Memory.h"
@@ -57,6 +57,11 @@ namespace ARMJIT
 
 Compiler* JITCompiler;
 
+int MaxBlockSize;
+bool LiteralOptimizations;
+bool BranchOptimizations;
+bool FastMemory;
+
 
 std::unordered_map<u32, JitBlock*> JitBlocks9;
 std::unordered_map<u32, JitBlock*> JitBlocks7;
@@ -326,6 +331,16 @@ void DeInit()
 
 void Reset()
 {
+    MaxBlockSize = Platform::GetConfigInt(Platform::JIT_MaxBlockSize);
+    LiteralOptimizations = Platform::GetConfigBool(Platform::JIT_LiteralOptimizations);
+    BranchOptimizations = Platform::GetConfigBool(Platform::JIT_BranchOptimizations);
+    FastMemory = Platform::GetConfigBool(Platform::JIT_FastMemory);
+
+    if (MaxBlockSize < 1)
+        MaxBlockSize = 1;
+    if (MaxBlockSize > 32)
+        MaxBlockSize = 32;
+
     JitEnableWrite();
     ResetBlockCache();
 
@@ -574,11 +589,6 @@ void CompileBlock(ARM* cpu)
 {
     bool thumb = cpu->CPSR & 0x20;
 
-    if (Config::JIT_MaxBlockSize < 1)
-        Config::JIT_MaxBlockSize = 1;
-    if (Config::JIT_MaxBlockSize > 32)
-        Config::JIT_MaxBlockSize = 32;
-
     u32 blockAddr = cpu->R[15] - (thumb ? 2 : 4);
 
     u32 localAddr = LocaliseCodeAddress(cpu->Num, blockAddr);
@@ -611,24 +621,24 @@ void CompileBlock(ARM* cpu)
         map.erase(existingBlockIt);
     }
 
-    FetchedInstr instrs[Config::JIT_MaxBlockSize];
+    FetchedInstr instrs[MaxBlockSize];
     int i = 0;
     u32 r15 = cpu->R[15];
 
-    u32 addressRanges[Config::JIT_MaxBlockSize];
+    u32 addressRanges[MaxBlockSize];
-    u32 addressMasks[Config::JIT_MaxBlockSize];
+    u32 addressMasks[MaxBlockSize];
-    memset(addressMasks, 0, Config::JIT_MaxBlockSize * sizeof(u32));
+    memset(addressMasks, 0, MaxBlockSize * sizeof(u32));
     u32 numAddressRanges = 0;
 
     u32 numLiterals = 0;
-    u32 literalLoadAddrs[Config::JIT_MaxBlockSize];
+    u32 literalLoadAddrs[MaxBlockSize];
     // they are going to be hashed
-    u32 literalValues[Config::JIT_MaxBlockSize];
+    u32 literalValues[MaxBlockSize];
-    u32 instrValues[Config::JIT_MaxBlockSize];
+    u32 instrValues[MaxBlockSize];
     // due to instruction merging i might not reflect the amount of actual instructions
     u32 numInstrs = 0;
 
-    u32 writeAddrs[Config::JIT_MaxBlockSize];
+    u32 writeAddrs[MaxBlockSize];
     u32 numWriteAddrs = 0, writeAddrsTranslated = 0;
 
     cpu->FillPipeline();
@@ -747,7 +757,7 @@ void CompileBlock(ARM* cpu)
         instrs[i].DataRegion = cpu->DataRegion;
 
         u32 literalAddr;
-        if (Config::JIT_LiteralOptimisations
+        if (LiteralOptimizations
             && instrs[i].Info.SpecialKind == ARMInstrInfo::special_LoadLiteral
             && DecodeLiteral(thumb, instrs[i], literalAddr))
         {
@@ -786,7 +796,7 @@ void CompileBlock(ARM* cpu)
             JIT_DEBUGPRINT("merged BL\n");
         }
 
-        if (instrs[i].Info.Branches() && Config::JIT_BranchOptimisations
+        if (instrs[i].Info.Branches() && BranchOptimizations
             && instrs[i].Info.Kind != (thumb ? ARMInstrInfo::tk_SVC : ARMInstrInfo::ak_SVC))
         {
             bool hasBranched = cpu->R[15] != r15;
@@ -823,7 +833,7 @@ void CompileBlock(ARM* cpu)
                         JIT_DEBUGPRINT("found %s idle loop %d in block %08x\n", thumb ? "thumb" : "arm", cpu->Num, blockAddr);
                     }
                 }
-                else if (hasBranched && !isBackJump && i + 1 < Config::JIT_MaxBlockSize)
+                else if (hasBranched && !isBackJump && i + 1 < MaxBlockSize)
                 {
                     if (link)
                     {
@@ -851,7 +861,7 @@ void CompileBlock(ARM* cpu)
                 }
             }
 
-            if (!hasBranched && cond < 0xE && i + 1 < Config::JIT_MaxBlockSize)
+            if (!hasBranched && cond < 0xE && i + 1 < MaxBlockSize)
             {
                 JIT_DEBUGPRINT("block lengthened by untaken branch\n");
                 instrs[i].Info.EndBlock = false;
@@ -865,7 +875,7 @@ void CompileBlock(ARM* cpu)
         bool secondaryFlagReadCond = !canCompile || (instrs[i - 1].BranchFlags & (branch_FollowCondTaken | branch_FollowCondNotTaken));
         if (instrs[i - 1].Info.ReadFlags != 0 || secondaryFlagReadCond)
             FloodFillSetFlags(instrs, i - 2, !secondaryFlagReadCond ? instrs[i - 1].Info.ReadFlags : 0xF);
-    } while(!instrs[i - 1].Info.EndBlock && i < Config::JIT_MaxBlockSize && !cpu->Halted && (!cpu->IRQ || (cpu->CPSR & 0x80)));
+    } while(!instrs[i - 1].Info.EndBlock && i < MaxBlockSize && !cpu->Halted && (!cpu->IRQ || (cpu->CPSR & 0x80)));
 
     if (numLiterals)
     {

src/ARMJIT.h

@@ -33,6 +33,11 @@ namespace ARMJIT
 
 typedef void (*JitBlockEntry)();
 
+extern int MaxBlockSize;
+extern bool LiteralOptimizations;
+extern bool BranchOptimizations;
+extern bool FastMemory;
+
 void Init();
 void DeInit();
 
@@ -58,4 +63,4 @@ void JitEnableExecute();
 
 extern "C" void ARM_Dispatch(ARM* cpu, ARMJIT::JitBlockEntry entry);
 
-#endif
+#endif

src/ARMJIT_x64/ARMJIT_LoadStore.cpp

@@ -106,7 +106,7 @@ bool Compiler::Comp_MemLoadLiteral(int size, bool signExtend, int rd, u32 addr)
 
     if (Thumb || CurInstr.Cond() == 0xE)
         RegCache.PutLiteral(rd, val);
-    
+
     return true;
 }
 
@@ -119,7 +119,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
     if (size == 16)
         addressMask = ~1;
 
-    if (Config::JIT_LiteralOptimisations && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
+    if (LiteralOptimizations && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
     {
         u32 addr = R15 + op2.Imm * ((flags & memop_SubtractOffset) ? -1 : 1);
 
@@ -136,7 +136,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
         Comp_AddCycles_CDI();
     }
 
-    bool addrIsStatic = Config::JIT_LiteralOptimisations
+    bool addrIsStatic = LiteralOptimizations
         && RegCache.IsLiteral(rn) && op2.IsImm && !(flags & (memop_Writeback|memop_Post));
     u32 staticAddress;
     if (addrIsStatic)
@@ -172,7 +172,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
         if (!(flags & memop_SubtractOffset) && rm.IsSimpleReg() && rnMapped.IsSimpleReg()
             && op2.Reg.Op == 0 && op2.Reg.Amount > 0 && op2.Reg.Amount <= 3)
         {
-            LEA(32, finalAddr, 
+            LEA(32, finalAddr,
                 MComplex(rnMapped.GetSimpleReg(), rm.GetSimpleReg(), 1 << op2.Reg.Amount, 0));
         }
         else
@@ -200,7 +200,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
         ? ARMJIT_Memory::ClassifyAddress9(CurInstr.DataRegion)
         : ARMJIT_Memory::ClassifyAddress7(CurInstr.DataRegion);
 
-    if (Config::JIT_FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || ARMJIT_Memory::IsFastmemCompatible(expectedTarget)))
+    if (ARMJIT::FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || ARMJIT_Memory::IsFastmemCompatible(expectedTarget)))
     {
         if (rdMapped.IsImm())
         {
@@ -370,7 +370,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
             }
 
             PopRegs(false, false);
-            
+
             if (!(flags & memop_Store))
             {
                 if (flags & memop_SignExtend)
@@ -431,7 +431,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
     else
         Comp_AddCycles_CD();
 
-    bool compileFastPath = Config::JIT_FastMemory
+    bool compileFastPath = FastMemory
         && !usermode && (CurInstr.Cond() < 0xE || ARMJIT_Memory::IsFastmemCompatible(expectedTarget));
 
     // we need to make sure that the stack stays aligned to 16 bytes
@@ -623,7 +623,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
             LEA(64, ABI_PARAM2, MDisp(RSP, allocOffset));
         else
             MOV(64, R(ABI_PARAM2), R(RSP));
-        
+
         MOV(32, R(ABI_PARAM3), Imm32(regsCount));
         if (Num == 0)
             MOV(64, R(ABI_PARAM4), R(RCPU));
@@ -637,7 +637,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
         }
 
         ADD(64, R(RSP), stackAlloc <= INT8_MAX ? Imm8(stackAlloc) : Imm32(stackAlloc));
-    
+
         PopRegs(false, false);
     }
 
@@ -668,7 +668,7 @@ void Compiler::A_Comp_MemWB()
     bool load = CurInstr.Instr & (1 << 20);
     bool byte = CurInstr.Instr & (1 << 22);
     int size = byte ? 8 : 32;
-    
+
     int flags = 0;
     if (!load)
         flags |= memop_Store;
@@ -742,7 +742,7 @@ void Compiler::T_Comp_MemReg()
     bool load = op & 0x2;
     bool byte = op & 0x1;
 
-    Comp_MemAccess(CurInstr.T_Reg(0), CurInstr.T_Reg(3), Op2(CurInstr.T_Reg(6), 0, 0), 
+    Comp_MemAccess(CurInstr.T_Reg(0), CurInstr.T_Reg(3), Op2(CurInstr.T_Reg(6), 0, 0),
         byte ? 8 : 32, load ? 0 : memop_Store);
 }
 
@@ -809,7 +809,7 @@ void Compiler::T_Comp_LoadPCRel()
 {
     u32 offset = (CurInstr.Instr & 0xFF) << 2;
     u32 addr = (R15 & ~0x2) + offset;
-    if (!Config::JIT_LiteralOptimisations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
+    if (!LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
         Comp_MemAccess(CurInstr.T_Reg(8), 15, Op2(offset), 32, 0);
 }
 

src/ARM_InstrInfo.cpp

@@ -20,7 +20,7 @@
 
 #include <stdio.h>
 
-#include "Config.h"
+#include "ARMJIT.h"
 
 namespace ARMInstrInfo
 {
@@ -230,7 +230,7 @@ enum {
     T_SetMaybeC     = 1 << 17,
     T_ReadC         = 1 << 18,
     T_SetC          = 1 << 19,
-    
+
     T_WriteMem      = 1 << 20,
     T_LoadMem       = 1 << 21,
 };
@@ -345,7 +345,7 @@ Info Decode(bool thumb, u32 num, u32 instr)
             res.DstRegs |= 1 << (instr & 0x7);
         if (data & T_Write8)
             res.DstRegs |= 1 << ((instr >> 8) & 0x7);
-        
+
         if (data & T_ReadHi0)
             res.SrcRegs |= 1 << ((instr & 0x7) | ((instr >> 4) & 0x8));
         if (data & T_ReadHi3)
@@ -381,12 +381,12 @@ Info Decode(bool thumb, u32 num, u32 instr)
 
         if (data & T_WriteMem)
             res.SpecialKind = special_WriteMem;
-        
+
         if (data & T_LoadMem)
         {
             if (res.Kind == tk_LDR_PCREL)
             {
-                if (!Config::JIT_LiteralOptimisations)
+                if (!ARMJIT::LiteralOptimizations)
                     res.SrcRegs |= 1 << 15;
                 res.SpecialKind = special_LoadLiteral;
             }
@@ -471,18 +471,18 @@ Info Decode(bool thumb, u32 num, u32 instr)
             res.SrcRegs |= 1 << ((instr >> 8) & 0xF);
         if (data & A_Read12)
             res.SrcRegs |= 1 << ((instr >> 12) & 0xF);
-        
+
         if (data & A_Write12)
             res.DstRegs |= 1 << ((instr >> 12) & 0xF);
         if (data & A_Write16)
             res.DstRegs |= 1 << ((instr >> 16) & 0xF);
-        
+
         if (data & A_MemWriteback && instr & (1 << 21))
             res.DstRegs |= 1 << ((instr >> 16) & 0xF);
 
         if (data & A_BranchAlways)
             res.DstRegs |= 1 << 15;
-        
+
         if (data & A_Read12Double)
         {
             res.SrcRegs |= 1 << ((instr >> 12) & 0xF);
@@ -530,7 +530,7 @@ Info Decode(bool thumb, u32 num, u32 instr)
             else
                 res.SpecialKind = special_LoadMem;
         }
-        
+
         if (res.Kind == ak_LDM)
         {
             u16 set = (instr & 0xFFFF);

src/Config.cpp

@@ -49,14 +49,6 @@ char DSiNANDPath[1024];
 int RandomizeMAC;
 int AudioBitrate;
 
-#ifdef JIT_ENABLED
-int JIT_Enable = false;
-int JIT_MaxBlockSize = 32;
-int JIT_BranchOptimisations = true;
-int JIT_LiteralOptimisations = true;
-int JIT_FastMemory = true;
-#endif
-
 ConfigEntry ConfigFile[] =
 {
     {"ExternalBIOSEnable", 0, &ExternalBIOSEnable, 0, NULL, 0},
@@ -80,18 +72,6 @@ ConfigEntry ConfigFile[] =
     {"RandomizeMAC", 0, &RandomizeMAC, 0, NULL, 0},
     {"AudioBitrate", 0, &AudioBitrate, 0, NULL, 0},
 
-#ifdef JIT_ENABLED
-    {"JIT_Enable", 0, &JIT_Enable, 0, NULL, 0},
-    {"JIT_MaxBlockSize", 0, &JIT_MaxBlockSize, 32, NULL, 0},
-    {"JIT_BranchOptimisations", 0, &JIT_BranchOptimisations, 1, NULL, 0},
-    {"JIT_LiteralOptimisations", 0, &JIT_LiteralOptimisations, 1, NULL, 0},
-    #ifdef __APPLE__
-        {"JIT_FastMemory", 0, &JIT_FastMemory, 0, NULL, 0},
-    #else
-        {"JIT_FastMemory", 0, &JIT_FastMemory, 1, NULL, 0},
-    #endif
-#endif
-
     {"", -1, NULL, 0, NULL, 0}
 };
 

src/Config.h

@@ -62,14 +62,6 @@ extern char DSiNANDPath[1024];
 extern int RandomizeMAC;
 extern int AudioBitrate;
 
-#ifdef JIT_ENABLED
-extern int JIT_Enable;
-extern int JIT_MaxBlockSize;
-extern int JIT_BranchOptimisations;
-extern int JIT_LiteralOptimisations;
-extern int JIT_FastMemory;
-#endif
-
 }
 
 #endif // CONFIG_H

src/NDS.cpp

@@ -80,6 +80,8 @@ u32 ARM7Regions[0x20000];
 ARMv5* ARM9;
 ARMv4* ARM7;
 
+bool EnableJIT;
+
 u32 NumFrames;
 u32 NumLagFrames;
 bool LagFrameFlag;
@@ -477,6 +479,8 @@ void Reset()
     FILE* f;
     u32 i;
 
+    EnableJIT = Platform::GetConfigBool(Platform::JIT_Enable);
+
     RunningGame = false;
     LastSysClockCycles = 0;
 
@@ -1103,7 +1107,7 @@ u32 RunFrame()
 u32 RunFrame()
 {
 #ifdef JIT_ENABLED
-    if (Config::JIT_Enable)
+    if (EnableJIT)
         return NDS::ConsoleType == 1
             ? RunFrame<true, 1>()
             : RunFrame<true, 0>();

src/NDS.h

@@ -162,6 +162,7 @@ struct MemRegion
     u32 Mask;
 };
 
+extern bool EnableJIT;
 extern int ConsoleType;
 extern int CurCPU;
 

src/Platform.h

@@ -36,6 +36,12 @@ void StopEmu();
 
 enum ConfigEntry
 {
+    JIT_Enable,
+    JIT_MaxBlockSize,
+    JIT_LiteralOptimizations,
+    JIT_BranchOptimizations,
+    JIT_FastMemory,
+
     DLDI_Enable,
     DLDI_ImagePath,
     DLDI_ImageSize,

src/frontend/qt_sdl/Platform.cpp

@@ -133,6 +133,8 @@ int GetConfigInt(ConfigEntry entry)
 
     switch (entry)
     {
+    case JIT_MaxBlockSize: return Config::JIT_MaxBlockSize;
+
     case DLDI_ImageSize: return imgsizes[Config::DLDISize];
 
     case DSiSD_ImageSize: return imgsizes[Config::DSiSDSize];
@@ -145,6 +147,11 @@ bool GetConfigBool(ConfigEntry entry)
 {
     switch (entry)
     {
+    case JIT_Enable: return Config::JIT_Enable != 0;
+    case JIT_LiteralOptimizations: return Config::JIT_LiteralOptimisations != 0;
+    case JIT_BranchOptimizations: return Config::JIT_BranchOptimisations != 0;
+    case JIT_FastMemory: return Config::JIT_FastMemory != 0;
+
     case DLDI_Enable: return Config::DLDIEnable != 0;
     case DLDI_ReadOnly: return Config::DLDIReadOnly != 0;
     case DLDI_FolderSync: return Config::DLDIFolderSync != 0;

src/frontend/qt_sdl/PlatformConfig.cpp

@@ -63,6 +63,14 @@ int ShowOSD;
 int ConsoleType;
 int DirectBoot;
 
+#ifdef JIT_ENABLED
+int JIT_Enable = false;
+int JIT_MaxBlockSize = 32;
+int JIT_BranchOptimisations = true;
+int JIT_LiteralOptimisations = true;
+int JIT_FastMemory = true;
+#endif
+
 int DLDIEnable;
 char DLDISDPath[1024];
 int DLDISize;
@@ -186,6 +194,18 @@ ConfigEntry PlatformConfigFile[] =
     {"ConsoleType", 0, &ConsoleType, 0, NULL, 0},
     {"DirectBoot", 0, &DirectBoot, 1, NULL, 0},
 
+#ifdef JIT_ENABLED
+    {"JIT_Enable", 0, &JIT_Enable, 0, NULL, 0},
+    {"JIT_MaxBlockSize", 0, &JIT_MaxBlockSize, 32, NULL, 0},
+    {"JIT_BranchOptimisations", 0, &JIT_BranchOptimisations, 1, NULL, 0},
+    {"JIT_LiteralOptimisations", 0, &JIT_LiteralOptimisations, 1, NULL, 0},
+    #ifdef __APPLE__
+        {"JIT_FastMemory", 0, &JIT_FastMemory, 0, NULL, 0},
+    #else
+        {"JIT_FastMemory", 0, &JIT_FastMemory, 1, NULL, 0},
+    #endif
+#endif
+
     {"DLDIEnable", 0, &DLDIEnable, 0, NULL, 0},
     {"DLDISDPath", 1, DLDISDPath, 0, "dldi.bin", 1023},
     {"DLDISize", 0, &DLDISize, 0, NULL, 0},

src/frontend/qt_sdl/PlatformConfig.h

@@ -79,6 +79,14 @@ extern int ShowOSD;
 extern int ConsoleType;
 extern int DirectBoot;
 
+#ifdef JIT_ENABLED
+extern int JIT_Enable;
+extern int JIT_MaxBlockSize;
+extern int JIT_BranchOptimisations;
+extern int JIT_LiteralOptimisations;
+extern int JIT_FastMemory;
+#endif
+
 extern int DLDIEnable;
 extern char DLDISDPath[1024];
 extern int DLDISize;