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fix bug that could cause nested IRQs. 

fix potential bug in MSR.
This commit is contained in:
StapleButter 2017-01-18 03:11:07 +01:00
parent 7f5ee5c00e
commit bff3a92cc0
3 changed files with 9 additions and 17 deletions
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15
ARM.cpp
View File

@ -210,18 +210,9 @@ void ARM::UpdateMode(u32 oldmode, u32 newmode)
void ARM::TriggerIRQ()
{
if ((CPSR & 0x80) && (!Halted))
if (CPSR & 0x80)
return;
/*if (Num==1)
{
printf("ARM7 IRQ %08X %08X\n", R[15], R_IRQ[0]);
if (NDS::Timers[5].Event)
{
printf("Timer1 %d %d\n", NDS::Timers[5].Counter, NDS::Timers[5].Event->Delay);
}
}*/
u32 oldcpsr = CPSR;
CPSR &= ~0xFF;
CPSR |= 0xD2;
@ -298,9 +289,7 @@ s32 ARM::Execute(s32 cycles)
TriggerIRQ();
}
//if (R[15] >= 0x3800170+4 && R[15]<=0x0380017A+4)
// printf("!! %08X: %08X | %08X %08X\n", R[15]-4, R[13], R[0], R[1]);
// temp. debug cruft
addr = R[15] - (CPSR&0x20 ? 4:8);
cpsr = CPSR;
}

5
ARMInterpreter.cpp
View File

@ -67,11 +67,14 @@ s32 A_MSR_IMM(ARM* cpu)
u32 oldpsr = *psr;
u32 mask = 0;
if (cpu->CurInstr & (1<<16)) mask |= 0x000000DF;
if (cpu->CurInstr & (1<<16)) mask |= 0x000000FF;
if (cpu->CurInstr & (1<<17)) mask |= 0x0000FF00;
if (cpu->CurInstr & (1<<18)) mask |= 0x00FF0000;
if (cpu->CurInstr & (1<<19)) mask |= 0xFF000000;
if (!(cpu->CurInstr & (1<<22)))
mask &= 0xFFFFFFDF;
if ((cpu->CPSR & 0x1F) == 0x10) mask &= 0xFFFFFF00;
u32 val = ROR((cpu->CurInstr & 0xFF), ((cpu->CurInstr >> 7) & 0x1E));

6
melonDS.depend
View File

@ -10,7 +10,7 @@
1481161027 c:\documents\sources\melonds\types.h
1484699425 source:c:\documents\sources\melonds\nds.cpp
1484702383 source:c:\documents\sources\melonds\nds.cpp
<stdio.h>
<string.h>
"NDS.h"
@ -22,7 +22,7 @@
"SPI.h"
"Wifi.h"
1484699468 source:c:\documents\sources\melonds\arm.cpp
1484705354 source:c:\documents\sources\melonds\arm.cpp
<stdio.h>
"NDS.h"
"ARM.h"
@ -38,7 +38,7 @@
"types.h"
"ARM.h"
1484538181 source:c:\documents\sources\melonds\arminterpreter.cpp
1484704018 source:c:\documents\sources\melonds\arminterpreter.cpp
<stdio.h>
"NDS.h"
"CP15.h"