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melonDS
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make it fasterer

This commit is contained in:
StapleButter 2018-12-09 01:26:51 +01:00
parent 29bca33bc6
commit b569c03884
4 changed files with 10 additions and 7 deletions
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6
src/ARM.cpp
View File

@ -506,9 +506,9 @@ s32 ARMv5::Execute()
AddCycles_C(); AddCycles_C();
} }
s32 diff = Cycles - lastcycles; //s32 diff = Cycles - lastcycles;
NDS::RunTimingCriticalDevices(0, diff >> ClockShift); //NDS::RunTimingCriticalDevices(0, diff >> ClockShift);
lastcycles = Cycles - (diff & ClockDiffMask); //lastcycles = Cycles - (diff & ClockDiffMask);
// TODO optimize this shit!!! // TODO optimize this shit!!!
if (Halted) if (Halted)

3
src/CP15.cpp
View File

@ -24,6 +24,9 @@
// access timing for cached regions // access timing for cached regions
// this would be an average between cache hits and cache misses // this would be an average between cache hits and cache misses
// this was measured to be close to hardware average
// a value of 1 would represent a perfect cache, but that causes
// games to run too fast, causing a number of issues
const int kDataCacheTiming = 2; const int kDataCacheTiming = 2;
const int kCodeCacheTiming = 1; const int kCodeCacheTiming = 1;

4
src/DMA.cpp
View File

@ -246,8 +246,6 @@ s32 DMA::Run(s32 cycles)
writefn(CurDstAddr, readfn(CurSrcAddr)); writefn(CurDstAddr, readfn(CurSrcAddr));
cycles -= unitcycles; cycles -= unitcycles;
NDS::RunTimingCriticalDevices(CPU, unitcycles);
CurSrcAddr += SrcAddrInc<<1; CurSrcAddr += SrcAddrInc<<1;
CurDstAddr += DstAddrInc<<1; CurDstAddr += DstAddrInc<<1;
IterCount--; IterCount--;
@ -310,8 +308,6 @@ s32 DMA::Run(s32 cycles)
writefn(CurDstAddr, readfn(CurSrcAddr)); writefn(CurDstAddr, readfn(CurSrcAddr));
cycles -= unitcycles; cycles -= unitcycles;
NDS::RunTimingCriticalDevices(CPU, unitcycles);
CurSrcAddr += SrcAddrInc<<2; CurSrcAddr += SrcAddrInc<<2;
CurDstAddr += DstAddrInc<<2; CurDstAddr += DstAddrInc<<2;
IterCount--; IterCount--;

4
src/NDS.cpp
View File

@ -804,14 +804,18 @@ u32 RunFrame()
ndscyclestorun = ARM9->Cycles >> 1; ndscyclestorun = ARM9->Cycles >> 1;
} }
RunTimingCriticalDevices(0, ndscyclestorun);
if (CPUStop & 0x0FFF0000) if (CPUStop & 0x0FFF0000)
{ {
s32 cycles = ndscyclestorun - ARM7Offset; s32 cycles = ndscyclestorun - ARM7Offset;
s32 critcycles = cycles;
cycles = DMAs[4]->Run(cycles); cycles = DMAs[4]->Run(cycles);
if (cycles > 0) cycles = DMAs[5]->Run(cycles); if (cycles > 0) cycles = DMAs[5]->Run(cycles);
if (cycles > 0) cycles = DMAs[6]->Run(cycles); if (cycles > 0) cycles = DMAs[6]->Run(cycles);
if (cycles > 0) cycles = DMAs[7]->Run(cycles); if (cycles > 0) cycles = DMAs[7]->Run(cycles);
ARM7Offset = -cycles; ARM7Offset = -cycles;
RunTimingCriticalDevices(1, critcycles);
} }
else else
{ {