Added more function documenting comments

Added const properties to the CP15Write/Read functions
This commit is contained in:
DesperateProgrammer 2024-02-04 12:48:06 +01:00
parent 2a385b5277
commit b1637e25a4
2 changed files with 32 additions and 4 deletions

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@ -523,8 +523,36 @@ public:
*/ */
void DCacheClearByASetAndWay(const u8 cacheSet, const u8 cacheLine); void DCacheClearByASetAndWay(const u8 cacheSet, const u8 cacheLine);
void CP15Write(u32 id, u32 val); /**
u32 CP15Read(u32 id) const; * @brief Handles MCR operations writing to cp15 registers
* @details
* This function updates the internal state of the emulator when
* a cp15 register is written, or triggers the corresponding action
* like flushing caches.
*
* @param [in] id the operation id to be performed, consisting of
* (from lower to higher nibble) opcode2, intermediate register,
* register and opcode1. Most write operations just take the first 3
* into account.
* param [in] val value to be written to the cp15 register
* @par Returns
* Nothing
*/
void CP15Write(const u32 id, const u32 val);
/**
* @brief handles MRC operations reading from cp15 registers
* @details
* This function accumulates the regsiter states from the internal
* emulator state. It does not modify the internal state of the
* emulator or cp15.
* @param [in] id the operation id to be performed, consisting of
* (from lower to higher nibble) opcode2, intermediate register,
* register and opcode1. Most read operations just take the first 3
* into account.
* @return Value of the cp15 register
*/
u32 CP15Read(const u32 id) const;
u32 CP15Control; //! CP15 Register 1: Control Register u32 CP15Control; //! CP15 Register 1: Control Register

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@ -760,7 +760,7 @@ bool ARMv5::IsAddressDCachable(const u32 addr) const
return PU_Map[addr >> CP15_MAP_ENTRYSIZE_LOG2] & CP15_MAP_DCACHEABLE ; return PU_Map[addr >> CP15_MAP_ENTRYSIZE_LOG2] & CP15_MAP_DCACHEABLE ;
} }
void ARMv5::CP15Write(u32 id, u32 val) void ARMv5::CP15Write(const u32 id, const u32 val)
{ {
//if(id!=0x704)printf("CP15 write op %03X %08X %08X\n", id, val, R[15]); //if(id!=0x704)printf("CP15 write op %03X %08X %08X\n", id, val, R[15]);
@ -1299,7 +1299,7 @@ void ARMv5::CP15Write(u32 id, u32 val)
Log(LogLevel::Debug, "unknown CP15 write op %04X %08X\n", id, val); Log(LogLevel::Debug, "unknown CP15 write op %04X %08X\n", id, val);
} }
u32 ARMv5::CP15Read(u32 id) const u32 ARMv5::CP15Read(const u32 id) const
{ {
//printf("CP15 read op %03X %08X\n", id, NDS::ARM9->R[15]); //printf("CP15 read op %03X %08X\n", id, NDS::ARM9->R[15]);