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melonDS
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this makes a bit more sense

This commit is contained in:
Jaklyy 2024-12-13 22:08:34 -05:00
parent cce5070077
commit a445c0d32c
1 changed files with 40 additions and 50 deletions
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64
src/CP15.cpp
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@ -2214,15 +2214,14 @@ void ARMv5::CodeRead32(u32 addr)
#endif
}
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
// bus reads can only overlap with dcache streaming by 6 cycles
if (DCacheStreamPtr < 7)
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
u64 time = DCacheStreamTimes[6] - 6; // checkme: minus 6?
if (NDS.ARM9Timestamp < time) NDS.ARM9Timestamp = time;
}
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
if (PU_Map[addr>>12] & 0x30)
WriteBufferDrain();
else
@ -2347,16 +2346,15 @@ void ARMv5::DRead8_2()
}
#endif
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: does dcache trigger this?
if (ICacheStreamPtr < 7)
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
u64 time = ICacheStreamTimes[6] - 6; // checkme: minus 6?
if (NDS.ARM9Timestamp < time) NDS.ARM9Timestamp = time;
}
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
if (PU_Map[addr>>12] & 0x30)
WriteBufferDrain();
else
@ -2463,16 +2461,15 @@ void ARMv5::DRead16_2()
}
#endif
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: does cache trigger this?
if (ICacheStreamPtr < 7)
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
u64 time = ICacheStreamTimes[6] - 6; // checkme: minus 6?
if (NDS.ARM9Timestamp < time) NDS.ARM9Timestamp = time;
}
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
if (PU_Map[addr>>12] & 0x30)
WriteBufferDrain();
else
@ -2580,16 +2577,15 @@ void ARMv5::DRead32_2()
}
#endif
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: does cache trigger this?
if (ICacheStreamPtr < 7)
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
u64 time = ICacheStreamTimes[6] - 6; // checkme: minus 6?
if (NDS.ARM9Timestamp < time) NDS.ARM9Timestamp = time;
}
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
if (PU_Map[addr>>12] & 0x30)
WriteBufferDrain();
else
@ -2683,16 +2679,15 @@ void ARMv5::DRead32S_2()
}
#endif
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: does cache trigger this?
if (ICacheStreamPtr < 7)
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
u64 time = ICacheStreamTimes[6] - 6; // checkme: minus 6?
if (NDS.ARM9Timestamp < time) NDS.ARM9Timestamp = time;
}
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
if (PU_Map[addr>>12] & 0x30) // checkme
WriteBufferDrain();
else
@ -2818,18 +2813,17 @@ void ARMv5::DWrite8_2()
}
#endif
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: does cache trigger this?
if (ICacheStreamPtr < 7)
if (!(PU_Map[addr>>12] & (0x30)))
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: do buffered writes trigger this?
if (ICacheStreamPtr < 7)
{
u64 time = ICacheStreamTimes[6] - 6; // checkme: minus 6?
if (NDS.ARM9Timestamp < time) NDS.ARM9Timestamp = time;
}
if (!(PU_Map[addr>>12] & (0x30)))
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
WriteBufferCheck<2>();
QueueFunction(&ARMv5::DWrite8_3);
}
@ -2933,18 +2927,17 @@ void ARMv5::DWrite16_2()
}
#endif
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: does cache trigger this?
if (ICacheStreamPtr < 7)
if (!(PU_Map[addr>>12] & 0x30))
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: do buffered writes trigger this?
if (ICacheStreamPtr < 7)
{
u64 time = ICacheStreamTimes[6] - 6; // checkme: minus 6?
if (NDS.ARM9Timestamp < time) NDS.ARM9Timestamp = time;
}
if (!(PU_Map[addr>>12] & 0x30))
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
WriteBufferCheck<2>();
QueueFunction(&ARMv5::DWrite16_3);
}
@ -3053,18 +3046,17 @@ void ARMv5::DWrite32_2()
}
#endif
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: does cache trigger this?
if (ICacheStreamPtr < 7)
if (!(PU_Map[addr>>12] & 0x30))
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: do buffered writes trigger this?
if (ICacheStreamPtr < 7)
{
u64 time = ICacheStreamTimes[6] - 6; // checkme: minus 6?
if (NDS.ARM9Timestamp < time) NDS.ARM9Timestamp = time;
}
if (!(PU_Map[addr>>12] & 0x30))
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
WriteBufferCheck<2>();
QueueFunction(&ARMv5::DWrite32_3);
}
@ -3168,18 +3160,16 @@ void ARMv5::DWrite32S_2()
}
#endif
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: does cache trigger this?
if (ICacheStreamPtr < 7)
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
u64 time = ICacheStreamTimes[6] - 6; // checkme: minus 6?
if (NDS.ARM9Timestamp < time) NDS.ARM9Timestamp = time;
}
if (!(PU_Map[addr>>12] & 0x30)) // non-bufferable
{
if (NDS.ARM9Timestamp < NDS.DMA9Timestamp) NDS.ARM9Timestamp = NDS.DMA9Timestamp;
// bus reads can only overlap with icache streaming by 6 cycles
// checkme: do buffered writes trigger this?
if (ICacheStreamPtr < 7)
{
u64 time = ICacheStreamTimes[6] - 6; // checkme: minus 6?
if (NDS.ARM9Timestamp < time) NDS.ARM9Timestamp = time;
}
WriteBufferCheck<2>();
QueueFunction(&ARMv5::DWrite32S_3);
}